Hello Graeme,
> This patch does two things:
> - Changes default behaviour to use proper memory accessors
> - Allows port-mapped access (using inb/outb) for the x86 architecture
>
> Signed-off-by: Graeme Russ <graeme.r...@gmail.com>
> ---
> drivers/serial/ns16550.c | 69
> ++++++++++++++++++++++++++--------------------
> 1 files changed, 39 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 2fcc8c3..c41ca0d 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -6,6 +6,8 @@
>
> #include <config.h>
> #include <ns16550.h>
> +#include <linux/types.h>
> +#include <asm/io.h>
>
> #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
> #define UART_MCRVAL (UART_MCR_DTR | \
> @@ -13,28 +15,35 @@
> #define UART_FCRVAL (UART_FCR_FIFO_EN | \
> UART_FCR_RXSR | \
> UART_FCR_TXSR) /* Clear & enable FIFOs */
> +#ifdef CONFIG_X86
> +#define uart_writeb(x,y) outb(x,(ulong)y)
> +#define uart_readb(y) inb((ulong)y)
> +#else
> +#define uart_writeb(x,y) writeb(x,y)
> +#define uart_readb(y) readb(y)
> +#endif
Why do you need a specific variant for X86 instead of implementing
writeb and readb correctly in the first place?
If this was in place, all the accessors should only switch to using
readb/writeb and from looking at it, this should not brak e.g. PowerPC
boards with weird register layouts.
When you post a patch with only these changes, I'll test it on a few of
the usual suspects on PowerPC.
Cheers
Detlev
--
More than any other time in history, mankind faces a crossroads. One
path leads to despair and utter hopelessness. The other to total
extinction. Let us pray, we have the wisdom to choose correctly.
-- Woody Allen
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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