This is the 5th version of patchset to adds support for Intel Arria 10 SoC. This version mainly resolved comments from Marek and Dinh in [v4]. The whole series is rebased on top of http://git.denx.de/?p=u-boot/u-boot-socfpga.git that already including 2 accepted patches from previous revision.
This is initial patchset enables the basic support for Arria 10 and other features will come after this. This series is working on top of ???arm: socfpga: Move to using distro boot??? series [1] from Dalon Westergreen. [1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg239616.html v4 -> v5 changes: ----------------- - Changed to use struct socfpga_sdr_ctrl for register access - Added macro for PINMUX_UART - Keep original copyright header for dts/dtsi files - Removed unused mmc paramteres from dts - Removed "0015-drivers-fpga-Add-compile-switch-for-Gen5-only-regist" from series - Fixed PHYS_SDRAM_1_SIZE to 1GB - Restored CONFIG_CMD_PXE and CONFIG_MENU for A10 Patchset history ---------------- [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg240052.html [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg241249.html [v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg243107.html [v4]: https://www.mail-archive.com/u-boot@lists.denx.de/msg243815.html Ley Foon Tan (16): arm: socfpga: Restructure clock manager driver arm: socfpga: Restructure reset manager driver arm: socfpga: Restructure system manager arm: socfpga: Restructure misc driver arm: socfpga: Add A10 macros arm: socfpga: Add reset driver support for Arria 10 arm: socfpga: Add clock driver for Arria 10 arm: socfpga: Add system manager for Arria 10 arm: socfpga: Add sdram header file for Arria 10 arm: socfpga: Add pinmux for Arria 10 arm: socfpga: Add misc support for Arria 10 arm: dts: Add dts and dtsi for Arria 10 arm: socfpga: Add SPL support for Arria 10 arm: socfpga: Add config and defconfig for Arria 10 arm: socfpga: Add board files for the Arria10 arm: socfpga: Enable build for Arria 10 arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria10.dtsi | 869 ++++++++++++++++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 38 + .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 481 +++++++++ arch/arm/mach-socfpga/Kconfig | 10 + arch/arm/mach-socfpga/Makefile | 41 +- arch/arm/mach-socfpga/clock_manager.c | 525 +--------- arch/arm/mach-socfpga/clock_manager_arria10.c | 1096 ++++++++++++++++++++ .../{clock_manager.c => clock_manager_gen5.c} | 137 +-- arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 317 +----- .../include/mach/clock_manager_arria10.h | 224 ++++ .../mach/{clock_manager.h => clock_manager_gen5.h} | 151 +-- arch/arm/mach-socfpga/include/mach/misc.h | 31 + arch/arm/mach-socfpga/include/mach/pinmux.h | 17 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 50 +- .../include/mach/reset_manager_arria10.h | 146 +++ .../mach-socfpga/include/mach/reset_manager_gen5.h | 49 + arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 202 ++-- .../include/mach/system_manager_arria10.h | 81 ++ .../{system_manager.h => system_manager_gen5.h} | 39 +- arch/arm/mach-socfpga/misc.c | 363 +------ arch/arm/mach-socfpga/misc_arria10.c | 259 +++++ arch/arm/mach-socfpga/{misc.c => misc_gen5.c} | 157 +-- arch/arm/mach-socfpga/pinmux_arria10.c | 96 ++ arch/arm/mach-socfpga/reset_manager.c | 93 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 383 +++++++ .../{reset_manager.c => reset_manager_gen5.c} | 51 +- arch/arm/mach-socfpga/spl.c | 75 +- .../{system_manager.c => system_manager_gen5.c} | 6 +- board/altera/arria10-socdk/Kconfig | 18 + board/altera/arria10-socdk/Makefile | 7 + board/altera/arria10-socdk/socfpga.c | 7 + configs/socfpga_arria10_defconfig | 29 + include/configs/socfpga_arria10_socdk.h | 66 ++ include/configs/socfpga_common.h | 21 +- include/dt-bindings/reset/altr,rst-mgr-a10.h | 110 ++ 38 files changed, 4837 insertions(+), 1797 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c copy arch/arm/mach-socfpga/{clock_manager.c => clock_manager_gen5.c} (85%) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h copy arch/arm/mach-socfpga/include/mach/{clock_manager.h => clock_manager_gen5.h} (79%) create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_arria10.h copy arch/arm/mach-socfpga/include/mach/{system_manager.h => system_manager_gen5.h} (73%) create mode 100644 arch/arm/mach-socfpga/misc_arria10.c copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (71%) create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c copy arch/arm/mach-socfpga/{reset_manager.c => reset_manager_gen5.c} (75%) rename arch/arm/mach-socfpga/{system_manager.c => system_manager_gen5.c} (94%) create mode 100644 board/altera/arria10-socdk/Kconfig create mode 100644 board/altera/arria10-socdk/Makefile create mode 100644 board/altera/arria10-socdk/socfpga.c create mode 100644 configs/socfpga_arria10_defconfig create mode 100644 include/configs/socfpga_arria10_socdk.h create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h -- 1.8.2.3
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