Convert Altera DDR SDRAM driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver.
Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com> Signed-off-by: Ley Foon Tan <ley.foon....@intel.com> --- drivers/Kconfig | 2 ++ drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 ++++++ drivers/ddr/altera/Makefile | 4 +++- include/configs/socfpga_common.h | 5 ----- 5 files changed, 12 insertions(+), 6 deletions(-) create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig diff --git a/drivers/Kconfig b/drivers/Kconfig index 0e5d97d..3e6bbac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig" source "drivers/crypto/Kconfig" +source "drivers/ddr/Kconfig" + source "drivers/demo/Kconfig" source "drivers/ddr/fsl/Kconfig" diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig new file mode 100644 index 0000000..b764add --- /dev/null +++ b/drivers/ddr/Kconfig @@ -0,0 +1 @@ +source "drivers/ddr/altera/Kconfig" diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig new file mode 100644 index 0000000..eb82038 --- /dev/null +++ b/drivers/ddr/altera/Kconfig @@ -0,0 +1,6 @@ +config ALTERA_SDRAM + bool "SoCFPGA DDR SDRAM driver" + depends on TARGET_SOCFPGA_GEN5 + default y if TARGET_SOCFPGA_GEN5 + help + Enable DDR SDRAM controller for the SoCFPGA devices. diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile index 1ca7058..bdd2872 100644 --- a/drivers/ddr/altera/Makefile +++ b/drivers/ddr/altera/Makefile @@ -8,4 +8,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ALTERA_SDRAM) += sdram.o sequencer.o +ifdef CONFIG_ALTERA_SDRAM +obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram.o sequencer.o +endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 55e0bf9..bc92a2c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -77,11 +77,6 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* - * SDRAM controller - */ -#define CONFIG_ALTERA_SDRAM - -/* * EPCS/EPCQx1 Serial Flash Controller */ #ifdef CONFIG_ALTERA_SPI -- 2.2.0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot