On Oct 22, 2009, at 7:39 PM, Peter Tyser wrote: > Add a new 'ecc' command to interact with the 85xx and 86xx DDR ECC > registers. The 'ecc' command can inject data/ECC errors to simulate > errors and provides an 'info' subcommand which displays ECC error > information such as failure address, read vs expected data/ECC, > physical signal which failed, single-bit error count, and multiple bit > error occurrence. An example of the 'ecc info' command follows: > > WARNING: ECC error in DDR Controller 0 > Addr: 0x0_01001000 > Data: 0x00000001_00000000 ECC: 0x00 > Expect: 0x00000000_00000000 ECC: 0x00 > Net: DATA32 > Syndrome: 0xce > Single-Bit errors: 0x40 > Attrib: 0x30112001 > Detect: 0x80000004 (MME, SBE) > > Signed-off-by: Peter Tyser <pty...@xes-inc.com> > Signed-off-by: John Schmoller <jschmol...@xes-inc.com> > --- > This code was tested on a 8572, 8640, and P2020. A board with a > 32-bit data bus was not tested however. > > cpu/mpc8xxx/ddr/Makefile | 2 + > cpu/mpc8xxx/ddr/ecc.c | 371 +++++++++++++++++++++++++++++++++ > +++++++++ > include/asm-ppc/immap_85xx.h | 4 + > include/asm-ppc/immap_86xx.h | 3 + > 4 files changed, 380 insertions(+), 0 deletions(-) > create mode 100644 cpu/mpc8xxx/ddr/ecc.c > > diff --git a/cpu/mpc8xxx/ddr/Makefile b/cpu/mpc8xxx/ddr/Makefile > index cb7f856..f073779 100644 > --- a/cpu/mpc8xxx/ddr/Makefile > +++ b/cpu/mpc8xxx/ddr/Makefile > @@ -22,6 +22,8 @@ COBJS-$(CONFIG_FSL_DDR3) += main.o util.o > ctrl_regs.o options.o \ > lc_common_dimm_params.o > COBJS-$(CONFIG_FSL_DDR3) += ddr3_dimm_params.o > > +COBJS-$(CONFIG_DDR_ECC_CMD) += ecc.o
Should this be CONFIG_FSL_DDR_ECC_CMD ? > + > SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) > OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
