Add a CONFIG_CHECK_ECC_ERRORS define which causes the SDRAM POST and
mtest command to check for ECC errors during execution.
The 85xx and 86xx architectures currently support enabling
CONFIG_CHECK_ECC_ERRORS. Other architectures/boards can use it if they
implement an ecc_count() and ecc_info() function.
Signed-off-by: Peter Tyser <pty...@xes-inc.com>
---
common/cmd_mem.c | 10 ++++++++++
cpu/mpc8xxx/ddr/Makefile | 2 +-
cpu/mpc8xxx/ddr/ecc.c | 4 ++++
include/common.h | 6 ++++++
post/drivers/memory.c | 5 +++++
5 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index a34b342..efedf79 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -691,6 +691,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc,
char *argv[])
__FUNCTION__, __LINE__, start, end);
for (;;) {
+#ifdef CONFIG_CHECK_ECC_ERRORS
+ if (ecc_count())
+ ecc_info();
+#endif
+
if (ctrlc()) {
putc ('\n');
return 1;
@@ -917,6 +922,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc,
char *argv[])
#else /* The original, quickie test */
incr = 1;
for (;;) {
+#ifdef CONFIG_CHECK_ECC_ERRORS
+ if (ecc_count())
+ ecc_info();
+#endif
+
if (ctrlc()) {
putc ('\n');
return 1;
diff --git a/cpu/mpc8xxx/ddr/Makefile b/cpu/mpc8xxx/ddr/Makefile
index f073779..935d72a 100644
--- a/cpu/mpc8xxx/ddr/Makefile
+++ b/cpu/mpc8xxx/ddr/Makefile
@@ -22,7 +22,7 @@ COBJS-$(CONFIG_FSL_DDR3) += main.o util.o ctrl_regs.o
options.o \
lc_common_dimm_params.o
COBJS-$(CONFIG_FSL_DDR3) += ddr3_dimm_params.o
-COBJS-$(CONFIG_DDR_ECC_CMD) += ecc.o
+COBJS-$(CONFIG_DDR_ECC) += ecc.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/cpu/mpc8xxx/ddr/ecc.c b/cpu/mpc8xxx/ddr/ecc.c
index bc80d7c..9db5cef 100644
--- a/cpu/mpc8xxx/ddr/ecc.c
+++ b/cpu/mpc8xxx/ddr/ecc.c
@@ -21,6 +21,7 @@
*/
#include <common.h>
+#if (defined(CONFIG_DDR_ECC_CMD) || defined(CONFIG_CHECK_ECC_ERRORS))
#include <asm/io.h>
#if defined(CONFIG_MPC85xx)
#include <mpc85xx.h>
@@ -279,7 +280,9 @@ void ecc_info(void)
in_be32(&ddr[controller]->err_sbe) & ~0xff);
}
}
+#endif /* CONFIG_DDR_ECC_CMD || CONFIG_CHECK_ECC_ERRORS */
+#ifdef CONFIG_DDR_ECC_CMD
static int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
static uint controller = 0;
@@ -369,3 +372,4 @@ U_BOOT_CMD(ecc, 5, 0, do_ecc,
"ecc inject off\n"
"\t- disable error injection\n"
);
+#endif /* CONFIG_DDR_ECC_CMD */
diff --git a/include/common.h b/include/common.h
index 7df9afa..b9e0fb1 100644
--- a/include/common.h
+++ b/include/common.h
@@ -556,6 +556,12 @@ int prt_8260_rsr (void);
int prt_83xx_rsr (void);
#endif
+/* $(CPU)/ecc.c */
+#ifdef CONFIG_CHECK_ECC_ERRORS
+void ecc_info(void);
+int ecc_count(void);
+#endif
+
/* $(CPU)/interrupts.c */
int interrupt_init (void);
void timer_interrupt (struct pt_regs *);
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index 0062360..b8bbac5 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -477,6 +477,11 @@ int memory_post_test (int flags)
}
}
+#ifdef CONFIG_CHECK_ECC_ERRORS
+ if (ecc_count())
+ printf("WARNING: %d ECC errors detected!!\n", ecc_count());
+#endif
+
return ret;
}
--
1.6.2.1
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