On 02/03/2017 02:24 PM, York Sun wrote: > Device memory needs to be set along with PXN and UNX bits. Normal memory > must clear these bits. To support modification of PXN, UXN bits, extend > existing function mmu_set_region_dcache_behaviour() to accept attributes > directly. Also fix parsing d-cache option by removing extra shifting. > > Signed-off-by: York Sun <york....@nxp.com> > CC: Alexander Graf <ag...@suse.de> > --- > Looks like original function mmu_set_region_dcache_behaviour() was written > to support changing d-cache option. However the PMD_ATTRINDX(option) shifts > it further higher. Maybe this function wasn't really used for ARMv8. > I have a need to update existing MMU table with a little bit more than > d-cache options. With a recent debug on memory barrier, it came to my > attention that code should run on "normal" memory, while "device" memory > should have PXN and UXN bits set. A new function mmu_set_region_attr() is > hence introduced and mmu_set_region_dcache_behaviour() becomes a wrapper. > > BTW, if we don't plan to use "read_start" and "real_size" variables, they > should be removed. >
Let's skip this patch for now. I have sent another set to address my issue with MMU update. We will need another patch to address the mistaken index. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
