Hi Jagan,
On 27/01/2017 09:54, Jagan Teki wrote:
> From: Jagan Teki <ja...@amarulasolutions.com>
>
> Boot from MMC:
> -------------
> U-Boot SPL 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33)
> Trying to boot from MMC1
>
> U-Boot 2017.01-rc2-gba3c151-dirty (Jan 02 2017 - 16:59:33 +0100)
>
> CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
> CPU: Industrial temperature grade (-40C to 105C) at 33C
> Reset cause: POR
> Model: Engicam Is.IoT MX6UL Starterkit
> DRAM: 512 MiB
> MMC: FSL_SDHC: 0
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> Net: CPU Net Initialization Failed
> No ethernet found.
> Hit any key to stop autoboot: 0
> isiotmx6ul>
>
> Cc: Stefano Babic <sba...@denx.de>
> Cc: Matteo Lisi <matteo.l...@engicam.com>
> Cc: Michael Trimarchi <mich...@amarulasolutions.com>
> Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
> ---
> arch/arm/cpu/armv7/mx6/Kconfig | 11 ++
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/imx6ul-isiot-mmc.dts | 50 +++++++
> arch/arm/dts/imx6ul-isiot.dtsi | 92 +++++++++++++
> board/engicam/isiotmx6ul/Kconfig | 12 ++
> board/engicam/isiotmx6ul/MAINTAINERS | 6 +
> board/engicam/isiotmx6ul/Makefile | 6 +
> board/engicam/isiotmx6ul/README | 28 ++++
> board/engicam/isiotmx6ul/isiotmx6ul.c | 247
> ++++++++++++++++++++++++++++++++++
> configs/imx6ul_isiot_mmc_defconfig | 36 +++++
> include/configs/imx6ul_isiot.h | 142 +++++++++++++++++++
> 11 files changed, 632 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts
> create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi
> create mode 100644 board/engicam/isiotmx6ul/Kconfig
> create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS
> create mode 100644 board/engicam/isiotmx6ul/Makefile
> create mode 100644 board/engicam/isiotmx6ul/README
> create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c
> create mode 100644 configs/imx6ul_isiot_mmc_defconfig
> create mode 100644 include/configs/imx6ul_isiot.h
>
> diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
> index c646966..72780d7 100644
> --- a/arch/arm/cpu/armv7/mx6/Kconfig
> +++ b/arch/arm/cpu/armv7/mx6/Kconfig
> @@ -205,6 +205,16 @@ config TARGET_MX6UL_GEAM
> select DM_THERMAL
> select SUPPORT_SPL
>
> +config TARGET_MX6UL_ISIOT
> + bool "Support Engicam Is.IoT MX6UL"
> + select MX6UL
> + select OF_CONTROL
> + select DM
> + select DM_GPIO
> + select DM_MMC
> + select DM_THERMAL
> + select SUPPORT_SPL
> +
> config TARGET_MX6ULL_14X14_EVK
> bool "Support mx6ull_14x14_evk"
> select MX6ULL
> @@ -313,6 +323,7 @@ source "board/embest/mx6boards/Kconfig"
> source "board/engicam/geam6ul/Kconfig"
> source "board/engicam/icorem6/Kconfig"
> source "board/engicam/icorem6_rqs/Kconfig"
> +source "board/engicam/isiotmx6ul/Kconfig"
> source "board/freescale/mx6qarm2/Kconfig"
> source "board/freescale/mx6qsabreauto/Kconfig"
> source "board/freescale/mx6sabresd/Kconfig"
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 6a7924e..e83308c 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -313,7 +313,8 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
> imx6dl-icore-rqs.dtb \
> imx6q-icore.dtb \
> imx6q-icore-rqs.dtb \
> - imx6ul-geam-kit.dtb
> + imx6ul-geam-kit.dtb \
> + imx6ul-isiot-mmc.dtb
>
> dtb-$(CONFIG_MX7) += imx7-colibri.dtb
>
> diff --git a/arch/arm/dts/imx6ul-isiot-mmc.dts
> b/arch/arm/dts/imx6ul-isiot-mmc.dts
> new file mode 100644
> index 0000000..bb5086a
> --- /dev/null
> +++ b/arch/arm/dts/imx6ul-isiot-mmc.dts
> @@ -0,0 +1,50 @@
> +/*
> + * Copyright (C) 2016 Amarula Solutions B.V.
> + * Copyright (C) 2016 Engicam S.r.l.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
I have seen that a lot of files slipped into mainline, and I have myself
not paid enough attention befeore (see your imx6ul-geam-kit.dts for
example).
But we moved some years ago to SPDX-License-Identifier. Other DTS files
are using this as well without copying the whole license. Could you do
this here, too ? It would be also nice if you plan to fix this for all
Engicam's boards, thanks !
> +
> +/dts-v1/;
> +
> +#include "imx6ul-isiot.dtsi"
> +
> +/ {
> + model = "Engicam Is.IoT MX6UL MMC Starterkit";
> + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
> +};
> diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi
> new file mode 100644
> index 0000000..6108a1a
> --- /dev/null
> +++ b/arch/arm/dts/imx6ul-isiot.dtsi
> @@ -0,0 +1,92 @@
> +/*
> + * Copyright (C) 2016 Amarula Solutions B.V.
> + * Copyright (C) 2016 Engicam S.r.l.
Ditto.
> diff --git a/board/engicam/isiotmx6ul/Kconfig
> b/board/engicam/isiotmx6ul/Kconfig
> new file mode 100644
> index 0000000..213ffad
> --- /dev/null
> +++ b/board/engicam/isiotmx6ul/Kconfig
> @@ -0,0 +1,12 @@
> +if TARGET_MX6UL_ISIOT
> +
> +config SYS_BOARD
> + default "isiotmx6ul"
> +
> +config SYS_VENDOR
> + default "engicam"
> +
> +config SYS_CONFIG_NAME
> + default "imx6ul_isiot"
> +
> +endif
> diff --git a/board/engicam/isiotmx6ul/MAINTAINERS
> b/board/engicam/isiotmx6ul/MAINTAINERS
> new file mode 100644
> index 0000000..0258531
> --- /dev/null
> +++ b/board/engicam/isiotmx6ul/MAINTAINERS
> @@ -0,0 +1,6 @@
> +GEAM6UL BOARD
> +M: Jagan Teki <ja...@amarulasolutions.com>
> +S: Maintained
> +F: board/engicam/isiotmx6ul
> +F: include/configs/imx6ul_isiot.h
> +F: configs/imx6ul_isiot_mmc_defconfig
Should you not add the DTS files ?
> diff --git a/board/engicam/isiotmx6ul/Makefile
> b/board/engicam/isiotmx6ul/Makefile
> new file mode 100644
> index 0000000..f4f8c78
> --- /dev/null
> +++ b/board/engicam/isiotmx6ul/Makefile
> @@ -0,0 +1,6 @@
> +# Copyright (C) 2016 Amarula Solutions B.V.
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y := isiotmx6ul.o
> diff --git a/board/engicam/isiotmx6ul/README b/board/engicam/isiotmx6ul/README
> new file mode 100644
> index 0000000..1d177ac
> --- /dev/null
> +++ b/board/engicam/isiotmx6ul/README
> @@ -0,0 +1,28 @@
> +How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit:
> +-----------------------------------------------------
> +
> +- Configure U-Boot for Engicam Is.IoT MX6UL
> +
> +$ make mrproper
> +$ make imx6ul_isiot_mmc_defconfig
> +$ make
> +
> +This will generate the SPL image called SPL and the u-boot-dtb.img.
> +
> +- Flash the SPL image into the micro SD card:
> +
> +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
> +
> +- Flash the u-boot-dtb.img image into the micro SD card:
> +
> +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync
> +
> +- Jumper settings:
> +
> +MMC Boot: JM3 Closed
> +
> +- Connect the Serial cable between the Starter Kit and the PC for the
> console.
> +(J28 is the Linux Serial console connector)
> +
> +- Insert the micro SD card in the board, power it up and U-Boot messages
> should
> +come up.
> diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c
> b/board/engicam/isiotmx6ul/isiotmx6ul.c
> new file mode 100644
> index 0000000..c0b18c3
> --- /dev/null
> +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
> @@ -0,0 +1,247 @@
> +/*
> + * Copyright (C) 2016 Amarula Solutions B.V.
> + * Copyright (C) 2016 Engicam S.r.l.
> + * Author: Jagan Teki <ja...@amarulasolutions.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +
> +#include <asm/io.h>
> +#include <asm/gpio.h>
> +#include <linux/sizes.h>
> +
> +#include <asm/arch/clock.h>
> +#include <asm/arch/crm_regs.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/arch/mx6-pins.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/imx-common/iomux-v3.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
> + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
> + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> +
> +static iomux_v3_cfg_t const uart1_pads[] = {
> + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
> + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
> +};
> +
> +int board_early_init_f(void)
> +{
> + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /* Address of boot parameters */
> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + gd->ram_size = imx_ddr_size();
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_SPL_BUILD
> +#include <libfdt.h>
> +#include <spl.h>
> +
> +#include <asm/arch/crm_regs.h>
> +#include <asm/arch/mx6-ddr.h>
> +
> +/* MMC board initialization is needed till adding DM support in SPL */
> +#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
> +#include <mmc.h>
> +#include <fsl_esdhc.h>
> +
> +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
> + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
> + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> +
> +static iomux_v3_cfg_t const usdhc1_pads[] = {
> + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +
> + /* VSELECT */
> + MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + /* CD */
> + MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
> + /* RST_B */
> + MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
> +};
> +
> +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19)
> +
> +struct fsl_esdhc_cfg usdhc_cfg[1] = {
> + {USDHC1_BASE_ADDR, 0, 4},
> +};
> +
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
> + int ret = 0;
> +
> + switch (cfg->esdhc_base) {
> + case USDHC1_BASE_ADDR:
> + ret = !gpio_get_value(USDHC1_CD_GPIO);
> + break;
> + }
> +
> + return ret;
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> + int i, ret;
> +
> + /*
> + * According to the board_mmc_init() the following map is done:
> + * (U-boot device node) (Physical Port)
> + * mmc0 USDHC1
> + */
> + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
> + switch (i) {
> + case 0:
> + imx_iomux_v3_setup_multiple_pads(
> + usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
> + gpio_direction_input(USDHC1_CD_GPIO);
> + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
> + break;
> + default:
> + printf("Warning - USDHC%d controller not supporting\n",
> + i + 1);
> + return 0;
> + }
> +
> + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
> + if (ret) {
> + printf("Warning: failed to initialize mmc dev %d\n", i);
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +#endif /* CONFIG_FSL_ESDHC */
> +
> +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
> + .grp_addds = 0x00000030,
> + .grp_ddrmode_ctl = 0x00020000,
> + .grp_b0ds = 0x00000030,
> + .grp_ctlds = 0x00000030,
> + .grp_b1ds = 0x00000030,
> + .grp_ddrpke = 0x00000000,
> + .grp_ddrmode = 0x00020000,
> + .grp_ddr_type = 0x000c0000,
> +};
> +
> +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
> + .dram_dqm0 = 0x00000030,
> + .dram_dqm1 = 0x00000030,
> + .dram_ras = 0x00000030,
> + .dram_cas = 0x00000030,
> + .dram_odt0 = 0x00000030,
> + .dram_odt1 = 0x00000030,
> + .dram_sdba2 = 0x00000000,
> + .dram_sdclk_0 = 0x00000008,
> + .dram_sdqs0 = 0x00000038,
> + .dram_sdqs1 = 0x00000030,
> + .dram_reset = 0x00000030,
> +};
> +
> +static struct mx6_mmdc_calibration mx6_mmcd_calib = {
> + .p0_mpwldectrl0 = 0x00070007,
> + .p0_mpdgctrl0 = 0x41490145,
> + .p0_mprddlctl = 0x40404546,
> + .p0_mpwrdlctl = 0x4040524D,
> +};
> +
> +struct mx6_ddr_sysinfo ddr_sysinfo = {
> + .dsize = 0,
> + .cs_density = 20,
> + .ncs = 1,
> + .cs1_mirror = 0,
> + .rtt_wr = 2,
> + .rtt_nom = 1, /* RTT_Nom = RZQ/2 */
> + .walat = 1, /* Write additional latency */
> + .ralat = 5, /* Read additional latency */
> + .mif3_mode = 3, /* Command prediction working mode */
> + .bi_on = 1, /* Bank interleaving enabled */
> + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
> + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
> + .ddr_type = DDR_TYPE_DDR3,
> +};
> +
> +static struct mx6_ddr3_cfg mem_ddr = {
> + .mem_speed = 800,
> + .density = 4,
> + .width = 16,
> + .banks = 8,
> + .rowaddr = 15,
> + .coladdr = 10,
> + .pagesz = 2,
> + .trcd = 1375,
> + .trcmin = 4875,
> + .trasmin = 3500,
> +};
> +
> +static void ccgr_init(void)
> +{
> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> +
> + writel(0xFFFFFFFF, &ccm->CCGR0);
> + writel(0xFFFFFFFF, &ccm->CCGR1);
> + writel(0xFFFFFFFF, &ccm->CCGR2);
> + writel(0xFFFFFFFF, &ccm->CCGR3);
> + writel(0xFFFFFFFF, &ccm->CCGR4);
> + writel(0xFFFFFFFF, &ccm->CCGR5);
> + writel(0xFFFFFFFF, &ccm->CCGR6);
> + writel(0xFFFFFFFF, &ccm->CCGR7);
Just a mention here: why do you activate all clocks instead of just what
you really need ?
> +}
> +
> +static void spl_dram_init(void)
> +{
> + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
> + mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
> +}
> +
> +void board_init_f(ulong dummy)
> +{
> + /* setup AIPS and disable watchdog */
> + arch_cpu_init();
> +
> + ccgr_init();
> +
> + /* iomux and setup of i2c */
> + board_early_init_f();
> +
> + /* setup GP timer */
> + timer_init();
> +
> + /* UART clocks enabled and gd valid - init serial console */
> + preloader_console_init();
> +
> + /* DDR initialization */
> + spl_dram_init();
> +
> + /* Clear the BSS. */
> + memset(__bss_start, 0, __bss_end - __bss_start);
> +
> + /* load/boot image from boot device */
> + board_init_r(NULL, 0);
> +}
> +#endif /* CONFIG_SPL_BUILD */
> diff --git a/configs/imx6ul_isiot_mmc_defconfig
> b/configs/imx6ul_isiot_mmc_defconfig
> new file mode 100644
> index 0000000..66eb59f
> --- /dev/null
> +++ b/configs/imx6ul_isiot_mmc_defconfig
> @@ -0,0 +1,36 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_MX6=y
> +CONFIG_SPL_GPIO_SUPPORT=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_TARGET_MX6UL_ISIOT=y
> +CONFIG_SPL_EXT_SUPPORT=y
> +CONFIG_SPL_LIBDISK_SUPPORT=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_WATCHDOG_SUPPORT=y
> +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc"
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC"
> +CONFIG_BOOTDELAY=3
> +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb"
> +CONFIG_SPL=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_SYS_PROMPT="isiotmx6ul> "
> +# CONFIG_CMD_IMLS is not set
> +CONFIG_CMD_MEMTEST=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +# CONFIG_BLK is not set
> +# CONFIG_DM_MMC_OPS is not set
> +CONFIG_PINCTRL=y
> +CONFIG_PINCTRL_IMX6=y
> +CONFIG_MXC_UART=y
> +CONFIG_IMX_THERMAL=y
> diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
> new file mode 100644
> index 0000000..aba43fc
> --- /dev/null
> +++ b/include/configs/imx6ul_isiot.h
> @@ -0,0 +1,142 @@
> +/*
> + * Copyright (C) 2016 Amarula Solutions B.V.
> + * Copyright (C) 2016 Engicam S.r.l.
> + *
> + * Configuration settings for the Engicam Is.IoT MX6UL Starter Kits.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __IMX6UL_ISIOT_CONFIG_H
> +#define __IMX6UL_ISIOT_CONFIG_H
> +
> +#include <linux/sizes.h>
> +#include "mx6_common.h"
> +
> +/* Size of malloc() pool */
> +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
> +
> +/* Total Size of Environment Sector */
> +#define CONFIG_ENV_SIZE SZ_128K
> +
> +/* Allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +
> +/* Environment */
> +#ifndef CONFIG_ENV_IS_NOWHERE
> +/* Environment in MMC */
> +# if defined(CONFIG_ENV_IS_IN_MMC)
> +# define CONFIG_ENV_OFFSET 0x100000
> +# endif
> +#endif
> +
> +/* Default environment */
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "script=boot.scr\0" \
> + "image=uImage\0" \
> + "fit_image=fit.itb\0" \
> + "splashpos=m,m\0" \
> + "console=ttymxc0\0" \
> + "fdt_high=0xffffffff\0" \
> + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> + "fdt_addr=0x87800000\0" \
> + "boot_fdt=try\0" \
> + "mmcdev=0\0" \
> + "mmcpart=1\0" \
> + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
> + "mmcautodetect=yes\0" \
> + "mmcargs=setenv bootargs console=${console},${baudrate} " \
> + "root=${mmcroot}\0" \
> + "loadbootscript=" \
> + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
> + "bootscript=echo Running bootscript from mmc ...; " \
> + "source\0" \
> + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> + "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
> + "fitboot=echo Booting FIT image from mmc ...; " \
> + "run mmcargs; " \
> + "bootm ${loadaddr}\0" \
> + "mmcboot=echo Booting from mmc ...; " \
> + "run mmcargs; " \
> + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
> + "if run loadfdt; then " \
> + "bootm ${loadaddr} - ${fdt_addr}; " \
> + "else " \
> + "if test ${boot_fdt} = try; then " \
> + "bootm; " \
> + "else " \
> + "echo WARN: Cannot load the DT; " \
> + "fi; " \
> + "fi; " \
> + "else " \
> + "bootm; " \
> + "fi\0"
> +
> +# define CONFIG_BOOTCOMMAND \
> + "if mmc rescan; then " \
> + "if run loadbootscript; then " \
> + "run bootscript; " \
> + "else " \
> + "if run loadfit; then " \
> + "run fitboot; " \
> + "else " \
> + "if run loadimage; then " \
> + "run mmcboot; " \
> + "fi; " \
> + "fi; " \
> + "fi; " \
> + "fi"
> +
> +/* Miscellaneous configurable options */
> +#define CONFIG_SYS_MEMTEST_START 0x80000000
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START +
> 0x8000000)
> +
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +#define CONFIG_SYS_HZ 1000
> +
> +/* Physical Memory Map */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
> +
> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
> +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
> + GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
> + CONFIG_SYS_INIT_SP_OFFSET)
> +
> +/* FIT */
> +#ifdef CONFIG_FIT
> +# define CONFIG_HASH_VERIFY
> +# define CONFIG_SHA1
> +# define CONFIG_SHA256
> +# define CONFIG_IMAGE_FORMAT_LEGACY
> +#endif
> +
> +/* UART */
> +#ifdef CONFIG_MXC_UART
> +# define CONFIG_MXC_UART_BASE UART1_BASE
> +#endif
> +
> +/* MMC */
> +#ifdef CONFIG_FSL_USDHC
> +# define CONFIG_SYS_MMC_ENV_DEV 0
> +# define CONFIG_SYS_FSL_USDHC_NUM 1
> +# define CONFIG_SYS_FSL_ESDHC_ADDR 0
> +#endif
> +
> +/* SPL */
> +#ifdef CONFIG_SPL
> +# define CONFIG_SPL_MMC_SUPPORT
> +
> +# include "imx6_spl.h"
> +# ifdef CONFIG_SPL_BUILD
> +# undef CONFIG_DM_GPIO
> +# undef CONFIG_DM_MMC
> +# endif
> +#endif
> +
> +#endif /* __IMX6UL_ISIOT_CONFIG_H */
>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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