On Tue, Jan 10, 2017 at 5:14 PM, Tom Rini <tr...@konsulko.com> wrote: > On Mon, Jan 09, 2017 at 12:12:09PM -0600, aford...@gmail.com wrote: > >> From: Adam Ford <aford...@gmail.com> >> >> On the OMAP36xx (and 37xx) the CONTROL_WKUP_CTRL register has >> a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which >> are related to the MMC are disabled. After the PBIAS is configured, >> this bit should be set high to enable the MMC port. >> >> Signed-off-by: Adam Ford <aford...@gmail.com> >> >> diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c >> index 0a1ee40..069fd5a 100644 >> --- a/drivers/mmc/omap_hsmmc.c >> +++ b/drivers/mmc/omap_hsmmc.c >> @@ -38,6 +38,7 @@ >> #include <asm/arch/sys_proto.h> >> #endif >> #include <dm.h> >> +#include <asm/arch-omap3/mux.h> >> >> DECLARE_GLOBAL_DATA_PTR; >> >> @@ -115,6 +116,11 @@ static unsigned char mmc_board_init(struct mmc *mmc) >> PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, >> &t2_base->pbias_lite); >> #ifdef OMAP36_MMC1_PINS >> + if (get_cpu_family() == CPU_OMAP36XX) >> + writel(readl(OMAP34XX_CTRL_WKUP_CTRL) | >> + OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ, >> + OMAP34XX_CTRL_WKUP_CTRL); >> + #endif
>> writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, >> &t2_base->devconf0); > > I think I'd like to see this with a build-time check to avoid bloating > all of the other families. Thanks! Since it's only on the OMAP36xx and 37xx (that I am aware) and it's specific for a couple pins on the MMC1 bus using GPIO_126, 127, and 129. If we encapsulated the update into and #ifdef, would that satisfy you? I added my proposed change above. I would also add the define into the omap3_logic_defconfig file. Any other OMAP36/37 boards could add it in. Does that work for you? If so, I'll submit an updated patch > > -- > Tom _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
