On Tue, Nov 29, 2016 at 12:07:50PM +0530, Lokesh Vutla wrote: > From: Nishanth Menon <n...@ti.com> > > For ECC enabled DDR, we use EDMA to reset all memory values to 0. For > K2E/L/H/K the priv ID of 8 was indicative of ARM, but that is not the > case for K2G, where it is 1. > > Unfortunately, ddr3 code had hard coded the privID and had missed > identification previously. Fix the same, else unforeseen behavior can > be expected in our reset of DDR contents to 0 for ECC enablement. > > Signed-off-by: Nishanth Menon <n...@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Reviewed-by: Tom Rini <tr...@konsulko.com> -- Tom
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