On Monday 28 November 2016 10:10 PM, Tom Rini wrote: > On Mon, Nov 28, 2016 at 03:04:42PM +0530, Lokesh Vutla wrote: > >> This series tries to add D-cache support in spl in order to reduce boot time >> either in 2stage boot or Falcon Boot. > > I assume you've measured and confirmed that there is a speed increase? > I ask since I'd tried this ages ago but..
Yes. I have verified it on all TI platforms. On DRA7-evm with MMCSD boot: without this series SPL took 607 ms to complete with this series SPL took 318 ms to complete. > >> >> Lokesh Vutla (3): >> arch: arm: omap: Declare size of ddr very early >> spl: reorder the assignment of board info to global data > > ... I didn't have changes like this, which is perhaps why it ended up > not working right. Thanks! > I am mainly worried about platforms other than TI(Just want to be sure that this series did not break other platforms) Thanks and regards, Lokesh _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
