On Mon, Nov 28, 2016 at 03:04:45PM +0530, Lokesh Vutla wrote: > Add support for enabling d-cache in SPL. The sequence in SPL tries to > replicate the sequence done in U-Boot except that MMU entries were added > for SRAM. > > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Reviewed-by: Tom Rini <tr...@konsulko.com> -- Tom
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