On Tue, Nov 22, 2016 at 01:38:38PM +0100, Maxime Ripard wrote: > The default U-Boot offset for the Allwinner SoCs was set to 32kB. > > This was probably to try to maintain some compatibility with the current > image that we build for the MMC where the U-Boot binary is also located at > a 32kB offset. > > However, this causes a number of issues. The first one is that it prevents > us from using a backup SPL entirely, which is troublesome in case where the > first would be corrupt (especially on MLC which have a higher number of > bitflips). > > We also cannot use the original MMC image on the NAND, because we need to > prepare the SPL image to include the ECCs and randomizer settings, which > reduces the interest of setting it at that particular offset. > > It also prevents us from upgrading and flashing the U-Boot and SPLs > independantly, since it's very likely that it will fall in the same erase > block. > > Since that default wasn't used by any board, change it for 8MB, which will > be in an erase block of its own, all the erase blocks being multiple of > two. The highest erase block size we encountered is 4MB, which means that > in this particular setup, the first and second erase blocks will be for the > SPL and its backup, and the third for U-Boot. > > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Reviewed-by: Tom Rini <tr...@konsulko.com> -- Tom
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