The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.
Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Nadav Haklai <nad...@marvell.com>
Cc: Neta Zur Hershkovits <n...@marvell.com>
Cc: Kostya Porotchkin <kos...@marvell.com>
Cc: Omri Itach <om...@marvell.com>
Cc: Igal Liberman <ig...@marvell.com>
Cc: Haim Boot <ha...@marvell.com>
Cc: Hanna Hawa <han...@marvell.com>
---
arch/arm/mach-mvebu/arm64-common.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-mvebu/arm64-common.c
b/arch/arm/mach-mvebu/arm64-common.c
index 7055a81..1fc2ff2 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -109,12 +109,20 @@ int arch_early_init_r(void)
{
struct udevice *dev;
int ret;
-
- /* Call the comphy code via the MISC uclass driver */
- ret = uclass_get_device(UCLASS_MISC, 0, &dev);
- if (ret) {
- debug("COMPHY init failed: %d\n", ret);
- return -ENODEV;
+ int i;
+
+ /*
+ * Loop over all MISC uclass drivers to call the comphy code
+ * and init all CP110 devices enabled in the DT
+ */
+ i = 0;
+ while (1) {
+ /* Call the comphy code via the MISC uclass driver */
+ ret = uclass_get_device(UCLASS_MISC, i++, &dev);
+
+ /* We're done, once no further CP110 device is found */
+ if (ret)
+ break;
}
/* Cause the SATA device to do its early init */
--
2.10.2
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