Hi Jaehoon,
I've tried to add the #define CONFIG_MMC_TRACE in the file
include/configs/zynq-common.h
But after compiled and boot u-boot, It doesn't appear any messages:
-------------------------------
U-Boot 2016.11-rc1-00139-gf5fd45f-dirty (Oct 13 2016 - 11:33:25 +0200)
Model: Zynq PicoZed Board
Board: Xilinx Zynq
DRAM: ECC disabled 1 GiB
MMC:
Using default environment
In: serial@e0001000
Out: serial@e0001000
Err: serial@e0001000
Model: Zynq PicoZed Board
Board: Xilinx Zynq
Net: No ethernet found.
** Bad device mmc 0 **
Checking if uenvcmd is set ...
Hit any key to stop autoboot: 0
Zynq> mmcinfo
No MMC device available
Zynq>
-------------------------------
I think I'm doing something wrong. Any suggestion?
As you know it doesn't work the ethernet as well as the SD Card, so I've
decided to get from the u-boot.dtb the u-boot.dts, and I've just realised
that the two ethernet ports have the status disabled, as well as the sdhci,
so I think is something related to the way the dtb file is generated.
To get the u-boot-dtb file, I had to configure:
> Device Tree Control Provider of DTB for DT control > (X) Separate DTB
for DT control
I usually use the mode (X ) Embedded DTB for DT control, because a use the
application bootgen from Xilinx and I need to have the dtb embedded, but I
used this way only to get the dts file.
This is the u-boot.dts file I got:
-------------------------------
/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-picozed", "xlnx,zynq-7000";
model = "Zynq PicoZed Board";
chosen {
};
aliases {
serial0 = "/amba/serial@e0001000";
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
clocks = <0x1 0x3>;
clock-latency = <0x3e8>;
cpu0-supply = <0x2>;
operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x1>;
clocks = <0x1 0x3>;
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
interrupt-parent = <0x3>;
reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
};
fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "VCCPINT";
regulator-min-microvolt = <0xf4240>;
regulator-max-microvolt = <0xf4240>;
regulator-boot-on;
regulator-always-on;
linux,phandle = <0x2>;
phandle = <0x2>;
};
amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <0x3>;
ranges;
adc@f8007100 {
compatible = "xlnx,zynq-xadc-1.00.a";
reg = <0xf8007100 0x20>;
interrupts = <0x0 0x7 0x4>;
interrupt-parent = <0x3>;
clocks = <0x1 0xc>;
};
can@e0008000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clocks = <0x1 0x13 0x1 0x24>;
clock-names = "can_clk", "pclk";
reg = <0xe0008000 0x1000>;
interrupts = <0x0 0x1c 0x4>;
interrupt-parent = <0x3>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
};
can@e0009000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clocks = <0x1 0x14 0x1 0x25>;
clock-names = "can_clk", "pclk";
reg = <0xe0009000 0x1000>;
interrupts = <0x0 0x33 0x4>;
interrupt-parent = <0x3>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
};
gpio@e000a000 {
compatible = "xlnx,zynq-gpio-1.0";
#gpio-cells = <0x2>;
#interrupt-cells = <0x2>;
clocks = <0x1 0x2a>;
gpio-controller;
interrupt-controller;
interrupt-parent = <0x3>;
interrupts = <0x0 0x14 0x4>;
reg = <0xe000a000 0x1000>;
};
i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <0x1 0x26>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x19 0x4>;
reg = <0xe0004000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
i2c@e0005000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <0x1 0x27>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x30 0x4>;
reg = <0xe0005000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x3>;
interrupt-controller;
reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
cache-controller@f8f02000 {
compatible = "arm,pl310-cache";
reg = <0xf8f02000 0x1000>;
interrupts = <0x0 0x2 0x4>;
arm,data-latency = <0x3 0x2 0x2>;
arm,tag-latency = <0x2 0x2 0x2>;
cache-unified;
cache-level = <0x2>;
};
memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
};
serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
clocks = <0x1 0x17 0x1 0x28>;
clock-names = "uart_clk", "pclk";
reg = <0xe0000000 0x1000>;
interrupts = <0x0 0x1b 0x4>;
};
serial@e0001000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "okay";
clocks = <0x1 0x18 0x1 0x29>;
clock-names = "uart_clk", "pclk";
reg = <0xe0001000 0x1000>;
interrupts = <0x0 0x32 0x4>;
u-boot,dm-pre-reloc;
};
spi@e0006000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0006000 0x1000>;
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x1a 0x4>;
clocks = <0x1 0x19 0x1 0x22>;
clock-names = "ref_clk", "pclk";
spi-max-frequency = <0x9ef21cc>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
spi@e0007000 {
compatible = "xlnx,zynq-spi-r1p6";
reg = <0xe0007000 0x1000>;
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x31 0x4>;
clocks = <0x1 0x1a 0x1 0x23>;
clock-names = "ref_clk", "pclk";
spi-max-frequency = <0x9ef21cc>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
spi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <0x1 0xa 0x1 0x2b>;
compatible = "xlnx,zynq-qspi-1.0";
status = "disabled";
interrupt-parent = <0x3>;
interrupts = <0x0 0x13 0x4>;
reg = <0xe000d000 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
};
ethernet@e000b000 {
compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000b000 0x1000>;
status = "disabled";
interrupts = <0x0 0x16 0x4>;
clocks = <0x1 0x1e 0x1 0x1e 0x1 0xd>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
ethernet@e000c000 {
compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000c000 0x1000>;
status = "disabled";
interrupts = <0x0 0x2d 0x4>;
clocks = <0x1 0x1f 0x1 0x1f 0x1 0xe>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
sdhci@e0100000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
clocks = <0x1 0x15 0x1 0x20>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x18 0x4>;
reg = <0xe0100000 0x1000>;
};
sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
clocks = <0x1 0x16 0x1 0x21>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x2f 0x4>;
reg = <0xe0101000 0x1000>;
};
slcr@f8000000 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
reg = <0xf8000000 0x1000>;
ranges;
linux,phandle = <0x4>;
phandle = <0x4>;
clkc@100 {
#clock-cells = <0x1>;
compatible = "xlnx,ps7-clkc";
fclk-enable = <0x0>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap",
"gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper",
"usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper",
"spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper",
"i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
"smc_aper", "swdt", "dbg_trc", "dbg_apb";
reg = <0x100 0x100>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
rstc@200 {
compatible = "xlnx,zynq-reset";
reg = <0x200 0x48>;
#reset-cells = <0x1>;
syscon = <0x4>;
};
pinctrl@700 {
compatible = "xlnx,pinctrl-zynq";
reg = <0x700 0x200>;
syscon = <0x4>;
};
};
dmac@f8003000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xf8003000 0x1000>;
interrupt-parent = <0x3>;
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5",
"dma6", "dma7";
interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4
0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
#dma-cells = <0x1>;
#dma-channels = <0x8>;
#dma-requests = <0x4>;
clocks = <0x1 0x1b>;
clock-names = "apb_pclk";
};
devcfg@f8007000 {
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <0x3>;
interrupts = <0x0 0x8 0x4>;
reg = <0xf8007000 0x100>;
clocks = <0x1 0xc 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
syscon = <0x4>;
};
timer@f8f00200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xf8f00200 0x20>;
interrupts = <0x1 0xb 0x301>;
interrupt-parent = <0x3>;
clocks = <0x1 0x4>;
};
timer@f8001000 {
interrupt-parent = <0x3>;
interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8001000 0x1000>;
};
timer@f8002000 {
interrupt-parent = <0x3>;
interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
compatible = "cdns,ttc";
clocks = <0x1 0x6>;
reg = <0xf8002000 0x1000>;
};
timer@f8f00600 {
interrupt-parent = <0x3>;
interrupts = <0x1 0xd 0x301>;
compatible = "arm,cortex-a9-twd-timer";
reg = <0xf8f00600 0x20>;
clocks = <0x1 0x4>;
};
usb@e0002000 {
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
status = "disabled";
clocks = <0x1 0x1c>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x15 0x4>;
reg = <0xe0002000 0x1000>;
phy_type = "ulpi";
};
usb@e0003000 {
compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
status = "disabled";
clocks = <0x1 0x1d>;
interrupt-parent = <0x3>;
interrupts = <0x0 0x2c 0x4>;
reg = <0xe0003000 0x1000>;
phy_type = "ulpi";
};
watchdog@f8005000 {
clocks = <0x1 0x2d>;
compatible = "cdns,wdt-r1p2";
interrupt-parent = <0x3>;
interrupts = <0x0 0x9 0x1>;
reg = <0xf8005000 0x1000>;
timeout-sec = <0xa>;
};
};
};
-------------------------------
Best regards.
On 12 October 2016 at 13:10, Jaehoon Chung <jh80.ch...@samsung.com> wrote:
> On 10/12/2016 05:36 PM, Oscar Gomez Fuente wrote:
> > Hi Jaehoon,
> >
> >
> > How can I enable the CONFG_MMC_TRACE? I couldn't find this option in the
> menuconfig.
> >
> > Is it enough to add "CONFIG_MMC_TRACE=y" in the .config file?
>
> Yes..CONFIG_MMC_TRACE=y or add the CONFIG_MMC_TRACE in your config file.
>
> Best Regards,
> Jaehoon Chung
>
> >
> >
> > Best regards.
> >
> > Oscar Gomez Fuente.
> >
> > On 12 October 2016 at 06:46, Jaehoon Chung <jh80.ch...@samsung.com
> <mailto:jh80.ch...@samsung.com>> wrote:
> >
> > Hi
> >
> > On 10/11/2016 11:08 PM, Oscar Gomez Fuente wrote:
> > > Hi everyone,
> > >
> > > I've just compiled u-boot for a picoZed platform with
> > > the zynq_picozed_defconfig, and I've realised that the NET and SD
> Card
> > > aren't recognised. In the init I see these messages:
> > >
> > > I boot from the SD Card and I see these messages from my uart
> terminal:
> > >
> > > ---------------------
> > > U-Boot 2016.11-rc1-00139-gf5fd45f (Oct 11 2016 - 15:48:54 +0200)
> > >
> > > Model: Zynq PicoZed Board
> > > Board: Xilinx Zynq
> > > DRAM: ECC disabled 1 GiB
> > > MMC:
> > > Using default environment
> > >
> > > In: serial@e0001000
> > > Out: serial@e0001000
> > > Err: serial@e0001000
> > > Model: Zynq PicoZed Board
> > > Board: Xilinx Zynq
> > > Net: No ethernet found.
> > > ** Bad device mmc 0 **
> > > Checking if uenvcmd is set ...
> > > Hit any key to stop autoboot: 0
> > > ---------------------
> > >
> > > So, I think something has broken. Could anyone chek this issue?
> >
> > Could you enable the CONFIG_MMC_TRACE? then we can see more
> information.
> > And which config do you use?
> >
> > Best Regards,
> > Jaehoon Chung
> >
> > >
> > >
> > > Thank you very much. Best regards.
> > >
> > > Oscar Gomez Fuente
> > > _______________________________________________
> > > U-Boot mailing list
> > > U-Boot@lists.denx.de <mailto:U-Boot@lists.denx.de>
> > > http://lists.denx.de/mailman/listinfo/u-boot <
> http://lists.denx.de/mailman/listinfo/u-boot>
> > >
> > >
> > >
> >
> >
>
>
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