2016-09-27 2:35 GMT+02:00 Simon Glass <s...@chromium.org>:
> Hi Paul,
>
> On 26 September 2016 at 12:29, Paul Burton <paul.bur...@imgtec.com> wrote:
>> The decode_regions() function in the PCI code presumes that
>> CONFIG_SYS_SDRAM_BASE is a physical address, which seems reasonable
>> given that README states that it should be.
>>
>> However there is also common code which expects CONFIG_SYS_SDRAM_BASE to
>> be an address accessible by the CPU, ie. a valid virtual address -
>> notably gd->ram_top is set to it & various pieces of data are located
>> relative to that, and getenv_bootm_low() defaults to
>> CONFIG_SYS_SDRAM_BASE as the lower bound on addresses to load into. Thus
>> on MIPS CONFIG_SYS_SDRAM_BASE is a virtual address.
>>
>> This patch takes the simple approach to fixing this & converts
>> CONFIG_SYS_SDRAM_BASE to a physical address for use by the PCI code when
>> built for MIPS.
>>
>> Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
>>
>> ---
>>
>> drivers/pci/pci-uclass.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
>> index 415c632..26fe0f4 100644
>> --- a/drivers/pci/pci-uclass.c
>> +++ b/drivers/pci/pci-uclass.c
>> @@ -848,7 +848,9 @@ static int decode_regions(struct pci_controller *hose,
>> const void *blob,
>>
>> /* Add a region for our local memory */
>> size = gd->ram_size;
>> -#ifdef CONFIG_SYS_SDRAM_BASE
>> +#if defined(CONFIG_MIPS)
>> + base = virt_to_phys((void *)CONFIG_SYS_SDRAM_BASE);
>> +#elif defined(CONFIG_SYS_SDRAM_BASE)
>> base = CONFIG_SYS_SDRAM_BASE;
>> #endif
>> if (gd->pci_ram_top && gd->pci_ram_top < base + size)
>> --
>> 2.10.0
>>
>
> Can you find another way? We don't want arch- or board-specific
> #ifdefs in uclasses or driver code.
>
I suggest that we fix all MIPS boards to configure
CONFIG_SYS_SDRAM_BASE as physical address. I guess that would be
simply 0 for all current supported MIPS boards. In "arch/mips/" there
are only two users ("arch/mips/cpu/start.S" and
"arch/mips/lib/bootm.c") which could be easily fixed to map
CONFIG_SYS_SDRAM_BASE to KSEG0.
--
- Daniel
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