On 09/20/2016 07:37 AM, Chin Liang See wrote: > On Mon, 2016-09-19 at 20:52 +0200, Marek Vasut wrote: >> On 09/19/2016 12:12 PM, Chin Liang See wrote: >>> On Mon, 2016-09-19 at 16:24 +0200, Marek Vasut wrote: >>>> On 09/15/2016 09:27 AM, Chin Liang See wrote: >>>>> Adding new handoff for SDRAM ctrcfg.extratime1 which is >>>>> required for stabil LPDDR2 operation >>>> >>>> ... stable ... >>>> >>>> Isn't SoCDK using DDR3 DRAM ? >>> >>> Yah, you are right where we won't need this patch and others except >>> #1 >>> one. Should I send v2 which only have first patch? >> >> Then should this register be set to zero on SoCDK ? > > Not required as the default value is zero.
OK, if we can avoid the ifdef(s) -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
