From: Chris Packham <chris.pack...@alliedtelesis.co.nz>
Add pin control settings for the NAND flash interface. This interface
is multiplexed with the device bus interface to the function is "dev"
not "nand" as one might expect.
Signed-off-by: Chris Packham <chris.pack...@alliedtelesis.co.nz>
Cc: Luka Perkov <luka.per...@sartura.hr>
Cc: Dirk Eibach <eib...@gdsys.de>
---
I don't think this is strictly necessary. A quick scan of boards that
use this family of processor all seem to set their MPP configurations
manually.
Another issue is that technically on the Armada-385 there are 4 possible
CE pins. The board I'm looking at happens to use CE#0 (mpp25) but mpp26,
mpp27 and mpp6 are all potentially available. I guess if any boards
actually use them they can add them to their pin specification. At the
very least such boards would need to update the num-cs property anyway.
arch/arm/dts/armada-38x.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/armada-38x.dtsi b/arch/arm/dts/armada-38x.dtsi
index dc8a1a6..9ecba8a 100644
--- a/arch/arm/dts/armada-38x.dtsi
+++ b/arch/arm/dts/armada-38x.dtsi
@@ -258,6 +258,14 @@
marvell,function = "i2c0";
};
+ nand_pins: nand-pins {
+ marvell,pins = "mpp22", "mpp34",
"mpp23", "mpp33",
+ "mpp38", "mpp28",
"mpp40", "mpp42",
+ "mpp35", "mpp36",
"mpp25", "mpp30",
+ "mpp32";
+ marvell,function = "dev";
+ };
+
mdio_pins: mdio-pins {
marvell,pins = "mpp4", "mpp5";
marvell,function = "ge";
--
2.9.2.518.ged577c6.dirty
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
