Hi!
I'm currently trying to get xHCI working on some BayTrail based
x86 boards. For this I've added DM support to xhci-pci and made a
small change to cache.h to enable compilation of the xhci driver on
x86 (please find those 2 patches attached - I'll send then to the
list once this is resolved). But I noticed that the xhci driver
hangs in xhci_queue_command() in this line:
xhci_writel(&ctrl->dba->doorbell[0], DB_VALUE_HOST);
when first writing to the doorbell register. Reading from this doorbell
register still works just fine.
IIRC, Simon has mentioned that xHCI still has some "issues" on x86.
Simon, is this what you have seen as well? Does anyone have some ideas
how to solve this?
Thanks,
Stefan
>From 4bea80aad551e1aad6f5402fa95b5da8b660ff2b Mon Sep 17 00:00:00 2001
From: Stefan Roese <s...@denx.de>
Date: Wed, 6 Jul 2016 08:29:03 +0200
Subject: [PATCH] x86: cache.h: Add default for CONFIG_SYS_CACHELINE_SIZE
Don't just define ARCH_DMA_MINALIGN but also CONFIG_SYS_CACHELINE_SIZE
if its undefined. This is needed for the xhci driver to compile.
Signed-off-by: Stefan Roese <s...@denx.de>
---
arch/x86/include/asm/cache.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 508b63f..4ff63c3 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -11,12 +11,12 @@
* If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise
* use 64-bytes, a safe default for x86.
*/
-#ifdef CONFIG_SYS_CACHELINE_SIZE
-#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
-#else
-#define ARCH_DMA_MINALIGN 64
+#ifndef CONFIG_SYS_CACHELINE_SIZE
+#define CONFIG_SYS_CACHELINE_SIZE 64
#endif
+#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
+
static inline void wbinvd(void)
{
asm volatile ("wbinvd" : : : "memory");
--
2.9.0
>From 73e74da69cc2606eb2815bd97f8c2dff3c17c6a7 Mon Sep 17 00:00:00 2001
From: Stefan Roese <s...@denx.de>
Date: Wed, 6 Jul 2016 08:27:19 +0200
Subject: [PATCH] WIP: usb: xhci-pci: Add DM support
This patch adds DM support to the xHCI PCI driver. Enabling its use
e.g. in x86 platforms.
Signed-off-by: Stefan Roese <s...@denx.de>
---
drivers/usb/host/xhci-pci.c | 76 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 361fcce..cf22047 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -7,12 +7,15 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <pci.h>
#include <usb.h>
#include "xhci.h"
+#ifndef CONFIG_DM_USB
+
/*
* Create the appropriate control structures to manage a new XHCI host
* controller.
@@ -58,3 +61,76 @@ int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
void xhci_hcd_stop(int index)
{
}
+
+#else
+
+static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
+ struct xhci_hcor **ret_hcor)
+{
+ struct xhci_hccr *hccr;
+ struct xhci_hcor *hcor;
+ u32 cmd;
+
+ hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
+ PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ hcor = (struct xhci_hcor *)((uintptr_t) hccr +
+ HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
+
+ debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
+ (u32)hccr, (u32)hcor,
+ (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
+
+ *ret_hccr = hccr;
+ *ret_hcor = hcor;
+
+ /* enable busmaster */
+ dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_MASTER;
+ dm_pci_write_config32(dev, PCI_COMMAND, cmd);
+}
+
+static int xhci_pci_probe(struct udevice *dev)
+{
+ struct xhci_hccr *hccr;
+ struct xhci_hcor *hcor;
+
+ xhci_pci_init(dev, &hccr, &hcor);
+
+ return xhci_register(dev, hccr, hcor);
+}
+
+static int xhci_pci_remove(struct udevice *dev)
+{
+ int ret;
+
+ ret = xhci_deregister(dev);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id xhci_pci_ids[] = {
+ { .compatible = "xhci-pci" },
+ { }
+};
+
+U_BOOT_DRIVER(xhci_pci) = {
+ .name = "xhci_pci",
+ .id = UCLASS_USB,
+ .probe = xhci_pci_probe,
+ .remove = xhci_pci_remove,
+ .of_match = xhci_pci_ids,
+ .ops = &xhci_usb_ops,
+ .platdata_auto_alloc_size = sizeof(struct usb_platdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+static struct pci_device_id xhci_pci_supported[] = {
+ { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
+ {},
+};
+
+U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
+
+#endif /* CONFIG_DM_USB */
--
2.9.0
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