> -----Original Message----- > From: York Sun [mailto:york....@nxp.com] > Sent: Thursday, May 19, 2016 4:28 AM > To: Shengzhou Liu <shengzhou....@nxp.com>; u-boot@lists.denx.de > Subject: Re: [U-Boot] [PATCH v2] armv8/ls2080ardb: Update DDR timing to > support more UDIMMs > > > > Shengzhou, > > I am still seeing it unstable on ls2085rdb-5 (ATX boardfarm) at 1866MT/s. It > can boot if I change clk_adjust to 5. Please work with hardware team to > confirm. > > York
York On LS1046RDB, the clk_adj is 9, an odd instead of even data, so we have to update it, and there will be more new boards in future. Shengzhou _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
