Am 15.03.2016 um 18:21 schrieb Alexander Graf:
> We want to be able to reuse device drivers from 32bit code, so let's add
> definitions for all the dcache options that 32bit code has.
>
> While at it, fix up the DCACHE_OFF configuration. That was setting the bits
> to declare a PTE a PTE and left the MAIR index bit at 0. Drop the useless
> bits and make the index explicit.
>
> Signed-off-by: Alexander Graf <ag...@suse.de>
> ---
> arch/arm/include/asm/system.h | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
> index ac1173d..832c1db 100644
> --- a/arch/arm/include/asm/system.h
> +++ b/arch/arm/include/asm/system.h
> @@ -26,8 +26,12 @@ u64 get_page_table_size(void);
> #define MMU_SECTION_SHIFT 21
> #define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
>
> +/* These constants need to be synced to the MT_ types in asm/armv8/mmu.h */
> enum dcache_option {
> - DCACHE_OFF = 0x3,
> + DCACHE_OFF = 0 << 2,
> + DCACHE_WRITETHROUGH = 3 << 2,
> + DCACHE_WRITEBACK = 4 << 2,
> + DCACHE_WRITEALLOC = 4 << 2,
Is it intentional that these two have the same value?
Regards,
Andreas
> };
>
> #define isb() \
--
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