On Sun, Aug 23, 2009 at 12:59 PM, Graeme Russ<graeme.r...@gmail.com> wrote:
> Allows earlier indication of boot progress by initialising the LEDs and
> Serial Port while the CPU is still in 16-bit (Real) mode
>
Just noticed a couple of quibbles in this patch - Nothing major
> diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h
> index 57c9904..723e38f 100644
> --- a/include/asm-i386/ic/sc520.h
> +++ b/include/asm-i386/ic/sc520.h
> @@ -1,6 +1,6 @@
> /*
> * (C) Copyright 2002
> - * Daniel Engström, Omicron Ceti AB <dan...@omicron.se>.
> + * Daniel Engstr�m, Omicron Ceti AB <dan...@omicron.se>.
> *
> * See file CREDITS for list of people who contributed to this
> * project.
> @@ -134,7 +134,8 @@ typedef struct sc520_mmcr {
> u16 gptmr0cnt; /* GP timer 0 count */
> u16 gptmr0maxcmpa; /* GP timer 0 maxcount compare A */
> u16 gptmr0maxcmpb; /* GP timer 0 maxcount compare B */
> - u16 gptmr1ctl; /* GP timer 1 mode/control */
> + u16 gptmr1ctl; /*#define SC520_SWTMRMILLI 0x
> + GP timer 1 mode/control */
> u16 gptmr1cnt; /* GP timer 1 count */
> u16 gptmr1maxcmpa; /* GP timer 1 maxcount compare A */
> u16 gptmr1maxcmpb; /* GP timer 1 maxcount compare B*/
> @@ -223,7 +224,8 @@ typedef struct sc520_mmcr {
> u8 pad_0xd8d[0x03];
> u8 gpdmaexttc3; /* GP-DMA channel 3 extender transfer count */
> u8 gpdmaexttc5; /* GP-DMA channel 5 extender transfer count */
> - u8 gpdmaexttc6; /* GP-DMA channel 6 extender transfer count */
> + u8 gpdmaexttc6; /* GP-DMA ch+#define SC520_CPUCTL
> 0x0001
> + annel 6 extender transfer count */
> u8 gpdmaexttc7; /* GP-DMA channel 7 extender transfer count */
> u8 pad_0xd94[0x4];
> u8 gpdmabcctl; /* buffer chaining control */
None of these should be in the patch. Should I resubmit now or wait until
discussion on the other parts has been finalised?
Regards
G
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