On Mon, Jan 18, 2016 at 7:11 AM, Simon Glass <s...@chromium.org> wrote:
> This is not needed. On reset wake-on-disconnect is already set. It may a
> problem during a soft reset or resume, but for now it does not seem
> important. Also drop the command register update since PCI auto-config
> does it for us.
>
> Signed-off-by: Simon Glass <s...@chromium.org>
> ---
>
> Changes in v2:
> - Rename from 'Convert EHCI init to use the DM PCI API'
> - Drop this init
> - Fix the USB PCI address in the device tree
>
>  arch/x86/cpu/ivybridge/Makefile               |  1 -
>  arch/x86/cpu/ivybridge/bd82x6x.c              |  3 ---
>  arch/x86/cpu/ivybridge/usb_ehci.c             | 29 
> ---------------------------
>  arch/x86/dts/chromebook_link.dts              | 12 +++++++++++
>  arch/x86/include/asm/arch-ivybridge/bd82x6x.h |  1 -
>  5 files changed, 12 insertions(+), 34 deletions(-)
>  delete mode 100644 arch/x86/cpu/ivybridge/usb_ehci.c
>

Reviewed-by: Bin Meng <bmeng...@gmail.com>
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