On 01/13/2016 07:50 PM, Marek Vasut wrote: > On Thursday, January 14, 2016 at 03:37:09 AM, Eric Nelson wrote: >> Hi Marek, > > Hi! > >> On 01/13/2016 07:10 PM, Marek Vasut wrote: >>> On Tuesday, December 22, 2015 at 04:37:12 PM, Eric Nelson wrote: >>>> Hi Marek, >>> >>> Hi Eric, >>> >>> [..] >>> >>>>>> This should also have parameters of mx6_ddr_sysinfo (input) and >>>>>> mx6_mmdc_calibration (output), at least for sysinfo->dsize >>>>> >>>>> Would it be possible for you to send a subsequent patch(set)? I would >>>>> like to have this code as a working base , since I tested this >>>>> thoroughly. If I apply all of your changes, it would basically mean >>>>> almost complete rewrite of the code and that would disallow me bisect >>>>> possible bugs introduced by these changes. >>>> >>>> I think that's a bit of overstatement, but I'm okay sending patches >>>> in principle. >>>> >>>> I do think that at least the test for calibration failure should be >>>> fixed before your patch is applied. >>>> >>>> This also has the benefit of allowing discussion about each of >>>> my points individually instead of in one e-mail thread. >>> >>> I have to admit I'm a bit lost in this. What do you say we ask Stefano >>> to apply this so people can start fiddling with it. I'd also like to >>> see the patches for MX6SX and your fixes (if you feel like it). >> >> I'm okay with that. >> >> I was hoping to check out the error handling code but unfortunately, >> the boards I have that are supporting SPL are all either i.MX6DL, >> i.MX6S, or i.MX6SL. >> >> You should be able to force a failure by setting WALAT and/or RALAT >> to extreme values and see how the DDR controller responds. > > I only have Q ;-) The DDR calibration code _should_ work on DL though. >
It at least needs a change to some #ifdefs: +#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) Regards, Eric _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
