York,
Just checking if you had seen this patch?
Cheers,
-Bryan
On Fri, Dec 18, 2015 at 8:16 PM, Bryan Hundven <bryanhund...@gmail.com> wrote:
> As I work to re-add p1_p2_rdb, CONFIG_P2020RDB conflicts with
> p1_p2_rdb's CONFIG_P2020RDB.
>
> Rename p1_p2_rdb_pc's CONFIG_P2020RDB to CONFIG_P2020RDB_PC.
>
> Signed-off-by: Bryan Hundven <bryanhund...@gmail.com>
> Cc: Andy Fleming <aflem...@freescale.com>
> Cc: York Sun <york...@freescale.com>
> ---
> board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
> configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_defconfig | 2 +-
> configs/P2020RDB-PC_NAND_defconfig | 2 +-
> configs/P2020RDB-PC_SDCARD_defconfig | 2 +-
> configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +-
> configs/P2020RDB-PC_defconfig | 2 +-
> include/configs/p1_p2_rdb_pc.h | 8 ++++----
> 10 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c
> b/board/freescale/p1_p2_rdb_pc/ddr.c
> index 946d503..ef59b58 100644
> --- a/board/freescale/p1_p2_rdb_pc/ddr.c
> +++ b/board/freescale/p1_p2_rdb_pc/ddr.c
> @@ -49,7 +49,7 @@ dimm_params_t ddr_raw_timing = {
> .refresh_rate_ps = 7800000,
> .tfaw_ps = 37500,
> };
> -#elif defined(CONFIG_P2020RDB)
> +#elif defined(CONFIG_P2020RDB_PC)
> /* Micron MT41J128M16_15E */
> dimm_params_t ddr_raw_timing = {
> .n_ranks = 1,
> diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> index 578bfc5..c7bb971 100644
> --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> CONFIG_TPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,NAND"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> index 19c795a..c79399e 100644
> --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SDCARD"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> index bdc5e43..898993f 100644
> --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SPIFLASH"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_defconfig
> b/configs/P2020RDB-PC_36BIT_defconfig
> index b9d4a47..16af720 100644
> --- a/configs/P2020RDB-PC_36BIT_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_defconfig
> @@ -1,7 +1,7 @@
> CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_NAND_defconfig
> b/configs/P2020RDB-PC_NAND_defconfig
> index ea9f830..19ec9d2 100644
> --- a/configs/P2020RDB-PC_NAND_defconfig
> +++ b/configs/P2020RDB-PC_NAND_defconfig
> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> CONFIG_TPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,NAND"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_SDCARD_defconfig
> b/configs/P2020RDB-PC_SDCARD_defconfig
> index 997887d..ee0fd33 100644
> --- a/configs/P2020RDB-PC_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_SDCARD_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SDCARD"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig
> b/configs/P2020RDB-PC_SPIFLASH_defconfig
> index e547ea4..40190c4 100644
> --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SPIFLASH"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
> index fdad880..6629285 100644
> --- a/configs/P2020RDB-PC_defconfig
> +++ b/configs/P2020RDB-PC_defconfig
> @@ -1,7 +1,7 @@
> CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
> index 60bedaa..e64805a 100644
> --- a/include/configs/p1_p2_rdb_pc.h
> +++ b/include/configs/p1_p2_rdb_pc.h
> @@ -154,7 +154,7 @@
> #define CONFIG_SYS_L2_SIZE (256 << 10)
> #endif
>
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_BOARDNAME "P2020RDB-PCA"
> #define CONFIG_NAND_FSL_ELBC
> #define CONFIG_P2020
> @@ -323,7 +323,7 @@
> #define CONFIG_LIBATA
> #define CONFIG_LBA48
>
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_SYS_CLK_FREQ 100000000
> #else
> #define CONFIG_SYS_CLK_FREQ 66666666
> @@ -382,7 +382,7 @@
> #define CONFIG_DIMM_SLOTS_PER_CTLR 1
>
> /* Default settings for DDR3 */
> -#ifndef CONFIG_P2020RDB
> +#ifndef CONFIG_P2020RDB_PC
> #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
> #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
> #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
> @@ -618,7 +618,7 @@
> #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
> #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
> #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
> #else
> #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
> --
> 2.5.0
>
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