With the old order of initialization the hcor pointer has been setup to
the same address as Exynos EHCI base address (0x12110000 instead of
0x12110010).
Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI
HCCPBASE register without doing proper clock initialization before.
To fix this problem hcor initialization has been moved after USB PHY setup.
Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value.
Signed-off-by: Lukasz Majewski <l.majew...@samsung.com>
---
drivers/usb/host/ehci-exynos.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 18e9251..bede04b 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -219,14 +219,14 @@ static int ehci_usb_probe(struct udevice *dev)
ctx->hcd = (struct ehci_hccr *)plat->hcd_base;
ctx->usb = (struct exynos_usb_phy *)plat->phy_base;
- hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd +
- HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase)));
/* setup the Vbus gpio here */
if (dm_gpio_is_valid(&plat->vbus_gpio))
dm_gpio_set_value(&plat->vbus_gpio, 1);
setup_usb_phy(ctx->usb);
+ hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd +
+ HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase)));
return ehci_register(dev, ctx->hcd, hcor, NULL, 0, USB_INIT_HOST);
}
--
2.0.0.rc2
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