On Tuesday, December 08, 2015 at 02:21:06 PM, Marek Vasut wrote: > The arch/arm/lib/cache-cp15.c checks for CONFIG_ARMV7 and if this macro is > set, it configures TTBR0 register. This register must be configured for the > cache on ARMv7 to operate correctly. > > The problem is that noone actually sets the CONFIG_ARMV7 macro and thus the > TTBR0 is not configured at all. On SoCFPGA, this produces all sorts of > minor issues which are hard to replicate, for example certain USB sticks > are not detected or QSPI NOR sometimes fails to write pages completely. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Tom Rini <tr...@konsulko.com> > Cc: Albert Aribaud <albert.u.b...@aribaud.net> > Cc: Simon Glass <s...@chromium.org>
Please ignore, after discussing this on IRC, we decided on doing s/CONFIG_ARMV7/CONFIG_CPU_V7/g instead. Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
