On Wednesday, December 02, 2015 at 07:12:51 AM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen <dinh.li...@gmail.com>
>
> Add arch_early_init_r function. The Arria10 has a firewall protection
> around the SDRAM and OCRAM. These firewalls are to be disabled in order
> for U-Boot to function.
>
> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com>
> ---
> v3:
> s/reset_assert_all_peripherals_except_l4wd0_l4timer0/socfpga_per_reset_all
> use CONFIG_SOCFPGA_GEN5
> v2: reuse misc functions from a5/c5
> ---
> arch/arm/mach-socfpga/misc.c | 53
> ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53
> insertions(+)
>
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index b110f5b..16d83d4 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -15,6 +15,7 @@
> #include <watchdog.h>
> #include <asm/arch/reset_manager.h>
> #include <asm/arch/scan_manager.h>
> +#include <asm/arch/sdram_a10.h>
> #include <asm/arch/system_manager.h>
> #include <asm/arch/dwmmc.h>
> #include <asm/arch/nic301.h>
> @@ -31,11 +32,20 @@ static struct socfpga_system_manager *sysmgr_regs =
> (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
> static struct socfpga_reset_manager *reset_manager_base =
> (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS;
> +#if defined(CONFIG_SOCFPGA_GEN5)
> static struct nic301_registers *nic301_regs =
> (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
> +#endif
> static struct scu_registers *scu_regs =
> (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
>
> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> +static const struct socfpga_noc_fw_ocram *noc_fw_ocram_base =
> + (void *)SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS;
> +static const struct socfpga_noc_fw_ddr_l3 *noc_fw_ddr_l3_base =
> + (void *)SOCFPGA_SDR_FIREWALL_L3_ADDRESS;
> +#endif
If you're using #ifdef -> #else down below in the code, please use it here as
well to be consistent.
> int dram_init(void)
> {
> gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
[...]
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