On Friday, November 20, 2015 at 05:21:08 PM, Marek Vasut wrote: > On Friday, November 20, 2015 at 03:49:46 PM, Jan Viktorin wrote: > > Hello Marek and U-Boot community, > > Hi, ahoj, > > > I am trying to build the U-Boot 2015.10 with SPL for the EBV SoCrates > > board (Altera SoC FPGA, Cyclone V). It builds, however, I am unable to > > boot. It does not print any output. I can boot the SoCrates board with > > an older bootloader generated by the Altera tools. > > The SoCrates was always a bit of an orphan, but I'm submitting a patch to > fix it now, since I have one. > > > I am able to build & run U-Boot for Altera SoC Development Kit (NOT > > SoCKit), the SPL works however U-Boot freezes... > > > > U-Boot 2015.10 (Nov 20 2015 - 15:43:36 +0100) > > > > CPU: Altera SoCFPGA Platform > > FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 > > BOOT: SD/MMC Internal Transceiver (3.0V) > > > > Watchdog enabled > > > > I2C: ready > > DRAM: 1 GiB > > MMC: SOCFPGA DWMMC: 0 > > *** Warning - bad CRC, using default environment > > > > In: serial > > Out: serial > > Err: serial > > Model: Altera SOCFPGA Cyclone V SoC Development Kit > > Autoboot in 3 seconds > > [...frozen here...] > > > > So, what is the status of the SPL for SoCFPGA in upstream? Does anybody > > test all the claimed socfpga platforms? > > I'm testing mostly MCVEVK and SoCkit and ArriaV SoCDK. Dinh, you wanna look > at the CV SoCDK issue ? I might be able to set it up later this weekend, > but don't hold your breath, I am pretty overloaded.
Update, my SoCdk boots just fine: U-Boot SPL 2016.01-rc1-00116-g75dfe33 (Nov 20 2015 - 17:24:50) drivers/ddr/altera/sequencer.c: Preparing to start memory calibration drivers/ddr/altera/sequencer.c: CALIBRATION PASSED drivers/ddr/altera/sequencer.c: Calibration complete Trying to boot from MMC U-Boot 2016.01-rc1-00116-g75dfe33 (Nov 20 2015 - 17:24:50 +0100) CPU: Altera SoCFPGA Platform FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 BOOT: SD/MMC External Transceiver (1.8V) Watchdog enabled I2C: ready DRAM: 1 GiB MMC: SOCFPGA DWMMC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Altera SOCFPGA Cyclone V SoC Development Kit Net: No ethernet found. Hit any key to stop autoboot: 0 => Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot