Hi Simon,
Do you have plan to support interrupt controller driver for U-Boot?
On Rockchip SDK uboot，interrupt is enabled, usb driver using interrupt for
speed up programing images.
U-Boot code has no a good interrupt controller driver platform, especially when
u-boot using dtb.
So, I haven't a good idea if I want to upstream rockchip interrupt driver, do
you have any suggestion?
Regards,
蔡文忠（CWZ）
c...@rock-chips.com
电话：+86-0591-83991906转8090
福州瑞芯微电子有限公司 Fuzhou Rockchip Electronics Co.Ltd
地址：福建省福州市铜盘路软件大道89号软件园A区21号楼 (350003)
Addr : No. 21 Building, A District, No.89,software Boulevard Fuzhou,Fujian,PRC
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From: Simon Glass
Date: 2015-08-24 23:12
To: U-Boot Mailing List
CC: Andre Przywara; FUKAUMI Naoki; huangtao; cwx; Ulrich Prinz; Sjoerd Simons;
Simon Glass; Joe Hershberger; Pantelis Antoniou; Marek Vasut; Albert Aribaud;
Lukasz Majewski; Pavel Herrmann
Subject: [PATCH v4 00/33] dm: Introduce Rockchip RK3288 support
The Rockchip RK3288 is based on a quad-core Cortex-A17 CPU and has a good
set of peripherals. Various full-featured U-Boot ports are available and
this is an attempt to bring those features into mainline. With this series
the Firefly RK3288 can boot to a prompt from an SD card.
Since much of the code is generic, this also supports the Radxa Rock 2.
Since there is no device tree available for that yet, it uses the same
config and device tree as the Firefly. This works because not all
peripherals are supported, so the differences don't matter.
Support for booting from USB OTG is also provided, using the on-chip boot
ROM and the rkflashtool utility. This can boot as far as SPL, but there is
no support for reading U-Boot proper from USB as yet. This requires
implementing a suitable protocol (perhaps DFU or Rockchip's proprietary
one) in SPL.
Support is also provided for the Hisense Chromebook, which is based on the
same SoC. In this case it boots from SPI rather than an SD card.
This seriea makes use of driver model including a number of recently added
uclasses:
- Clocks - setting and getting PLL and peripheral clocks
- Pinctrl - adjusting pin multiplexing settings
- Reset - reseting the board or SoC
- RAM - setting up RAM controllers and detecting the available RAM
- MMC - MMC controllers (using the existing block device framework)
- LEDs - turning LEDs on and off, with only a GPIO driver so far
This series avoids hard-coding RK3288-specific code into the build. There
is a CONFIG_ROCKCHIP_RK3288 but it only *adds* support for RK3288. In
principle another CONFIG could add support for a different Rockchip SoC
with only the device tree selecting which one U-Boot works on.
Support is provided in mkimage to build these image types:
- rkimage - suitable for packaging up SPL to be sent to the boot ROM over
USB OTG
- rksd - suitable for writing to an SD card
Much of the source and ideas for this series came from downstream Rockchip
U-Boot trees. SDRAM init came from Coreboot. In most cases it has been
pretty heavily cleaned up / rewritten to meet U-Boot style and remove
hard-coding of things.
Drivers are provided for:
- Clocks
- Pinctrl
- SoC reset
- DDR3 SDRAM
- I2C
- SPI
- GPIOs
- LEDs using GPIOS
- MMC
- Firefly main PMIC (ACT8846) and included regulators
These are lightly tested and doubtless some problems exist with some,
particularly I2C.
One problem with device tree is that U-Boot has no way of dropping features
it does not need or use. For SPL this problem needs to be solved and this
series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree
reduces to a 6KB bytes when unused material is removed. SDRAM timings are
also in the device tree.
There is a large amount of additional work to bring other Rockchip drivers
and features into mainline U-Boot, so this is only a start.
Note: This series sits on top of Masahiro's RFC pinctrl series. I wanted to
get a new version out while we wait for this to make it to mainline. You can
find this series at u-boot-dm/rockchip-working.
Changes in v4:
- Add a set_state_simple() method
- Adjust the defconfig file to suit mainline
- Rename pinctrl.h to dm/pinctrl.h
- Tweak the cover letter a little, drop mention of patches already applied
- Use CONFIG_SPL_LED instead of CONFIG_SPL_LED_SUPPORT
Changes in v3:
- Add device tree bindings for CRU and DMC
- Add various new patches to get RK3288 booting to a prompt
- Make use of additional features since version 2
- Update README to mention available drivers
- Update clock rate to always be 24MHz
Changes in v2:
- Drop use of CONFIG_USE_PRIVATE_LIBGCC=y
- Tidy up license headers and remove SPL #ifdefs
Masahiro Yamada (1):
dm: do not return pointer if NULL is given to devp of device_bind()
Simon Glass (32):
pinctrl: Correct build errors in the pinctrl_simple
pinctrl: Add help text to Kconfig
pinctrl: Add the concept of peripheral IDs
mmc: Support bypass mode with the get_mmc_clk() method
dm: Improve handling of a missing uclass
dm: Provide better debugging when a device fails to bind
arm: reset: Avoid a build error when the reset uclass is enabled
rockchip: Add serial support
rockchip: Bring in RK3288 device tree file includes and bindings
rockchip: rk3288: dts: Make core devices available early
mkimage: Allow padding to any length
mkimage: Allow the original file size to be recorded
rockchip: Add the rkimage format to mkimage
rockchip: Add support for the SD image
rockchip: Add support for the SPI image
rockchip: gpio: Add rockchip GPIO driver
rockchip: Add basic peripheral and clock definitions
power: Add support for ACT8846 PMIC
power: regulator: Add a driver for ACT8846 regulators
rockchip: rk3288: Add clock driver
rockchip: rk3288: Add header files for PMU and GRF
rockchip: rk3288: Add SoC reset driver
rockchip: rk3288: Add a simple syscon driver
rockchip: rk3288: Add pinctrl driver
rockchip: rk3288: Add SDRAM init
rockchip: Add an MMC driver
rockchip: Add core SoC start-up code
rockchip: Add I2C driver
rockchip: Add SPI driver
rockchip: Add basic support for firefly-rk3288
rockchip: Add basic support for jerry
rockchip: Add a simple README
arch/arm/Kconfig | 10 +
arch/arm/Makefile | 1 +
arch/arm/dts/Makefile | 3 +
arch/arm/dts/cros-ec-sbs.dtsi | 16 +
arch/arm/dts/rk3288-firefly.dts | 75 +
arch/arm/dts/rk3288-firefly.dtsi | 457 ++++++
arch/arm/dts/rk3288-jerry.dts | 203 +++
arch/arm/dts/rk3288-thermal.dtsi | 88 ++
arch/arm/dts/rk3288-veyron-chromebook.dtsi | 200 +++
arch/arm/dts/rk3288-veyron.dtsi | 844 +++++++++++
arch/arm/dts/rk3288.dtsi | 1473 ++++++++++++++++++++
arch/arm/include/asm/arch-rockchip/clock.h | 45 +
arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 185 +++
arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 484 +++++++
arch/arm/include/asm/arch-rockchip/gpio.h | 28 +
arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 768 ++++++++++
arch/arm/include/asm/arch-rockchip/hardware.h | 20 +
arch/arm/include/asm/arch-rockchip/i2c.h | 70 +
arch/arm/include/asm/arch-rockchip/periph.h | 54 +
arch/arm/include/asm/arch-rockchip/pmu_rk3288.h | 89 ++
arch/arm/include/asm/arch-rockchip/sdram.h | 92 ++
arch/arm/lib/Makefile | 2 +
arch/arm/mach-rockchip/Kconfig | 41 +
arch/arm/mach-rockchip/Makefile | 13 +
arch/arm/mach-rockchip/board-spl.c | 290 ++++
arch/arm/mach-rockchip/board.c | 46 +
arch/arm/mach-rockchip/common.c | 28 +
arch/arm/mach-rockchip/rk3288/Kconfig | 26 +
arch/arm/mach-rockchip/rk3288/Makefile | 9 +
arch/arm/mach-rockchip/rk3288/reset_rk3288.c | 47 +
arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 878 ++++++++++++
arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 25 +
board/firefly/firefly-rk3288/Kconfig | 15 +
board/firefly/firefly-rk3288/MAINTAINERS | 6 +
board/firefly/firefly-rk3288/Makefile | 7 +
board/firefly/firefly-rk3288/firefly-rk3288.c | 7 +
board/google/chromebook_jerry/Kconfig | 15 +
board/google/chromebook_jerry/MAINTAINERS | 6 +
board/google/chromebook_jerry/Makefile | 7 +
board/google/chromebook_jerry/jerry.c | 7 +
board/google/common/Makefile | 2 +-
common/image.c | 3 +
configs/chromebook_jerry_defconfig | 43 +
configs/firefly-rk3288_defconfig | 43 +
doc/README.rockchip | 246 ++++
.../clock/rockchip,rk3188-cru.txt | 61 +
.../clock/rockchip,rk3288-cru.txt | 61 +
.../clock/rockchip,rk3288-dmc.txt | 155 ++
doc/device-tree-bindings/clock/rockchip.txt | 77 +
.../pinctrl/rockchip,pinctrl.txt | 157 +++
.../thermal/rockchip-thermal.txt | 68 +
drivers/clk/Makefile | 1 +
drivers/clk/clk_rk3288.c | 618 ++++++++
drivers/core/device.c | 10 +-
drivers/core/root.c | 5 +-
drivers/core/uclass.c | 7 +-
drivers/gpio/Kconfig | 9 +
drivers/gpio/Makefile | 1 +
drivers/gpio/rk_gpio.c | 123 ++
drivers/i2c/Kconfig | 9 +
drivers/i2c/Makefile | 1 +
drivers/i2c/rk_i2c.c | 391 ++++++
drivers/mmc/Kconfig | 9 +
drivers/mmc/Makefile | 1 +
drivers/mmc/dw_mmc.c | 2 +-
drivers/mmc/exynos_dw_mmc.c | 2 +-
drivers/mmc/rockchip_mmc.c | 98 ++
drivers/pinctrl/Kconfig | 22 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-uclass.c | 41 +-
drivers/pinctrl/rockchip/Makefile | 8 +
drivers/pinctrl/rockchip/pinctrl_rk3288.c | 441 ++++++
drivers/power/pmic/Kconfig | 9 +
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/act8846.c | 90 ++
drivers/power/regulator/Kconfig | 9 +
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/act8846.c | 155 ++
drivers/serial/Kconfig | 9 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_rockchip.c | 43 +
drivers/spi/Kconfig | 9 +
drivers/spi/Makefile | 1 +
drivers/spi/rk_spi.c | 375 +++++
drivers/spi/rk_spi.h | 121 ++
include/configs/chromebook_jerry.h | 16 +
include/configs/firefly-rk3288.h | 15 +
include/configs/rk3288_common.h | 98 ++
include/dm/pinctrl.h | 61 +
include/dt-bindings/clock/rk3288-cru.h | 370 +++++
include/dt-bindings/clock/rockchip,rk808.h | 11 +
include/dt-bindings/pinctrl/rockchip.h | 26 +
include/dt-bindings/power-domain/rk3288.h | 11 +
include/dwmmc.h | 16 +-
include/image.h | 5 +-
include/power/act8846_pmic.h | 37 +
tools/Makefile | 3 +
tools/imagetool.h | 1 +
tools/mkimage.c | 23 +-
tools/rkcommon.c | 72 +
tools/rkcommon.h | 28 +
tools/rkimage.c | 65 +
tools/rksd.c | 102 ++
tools/rkspi.c | 119 ++
104 files changed, 11274 insertions(+), 25 deletions(-)
create mode 100644 arch/arm/dts/cros-ec-sbs.dtsi
create mode 100644 arch/arm/dts/rk3288-firefly.dts
create mode 100644 arch/arm/dts/rk3288-firefly.dtsi
create mode 100644 arch/arm/dts/rk3288-jerry.dts
create mode 100644 arch/arm/dts/rk3288-thermal.dtsi
create mode 100644 arch/arm/dts/rk3288-veyron-chromebook.dtsi
create mode 100644 arch/arm/dts/rk3288-veyron.dtsi
create mode 100644 arch/arm/dts/rk3288.dtsi
create mode 100644 arch/arm/include/asm/arch-rockchip/clock.h
create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3288.h
create mode 100644 arch/arm/include/asm/arch-rockchip/ddr_rk3288.h
create mode 100644 arch/arm/include/asm/arch-rockchip/gpio.h
create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3288.h
create mode 100644 arch/arm/include/asm/arch-rockchip/hardware.h
create mode 100644 arch/arm/include/asm/arch-rockchip/i2c.h
create mode 100644 arch/arm/include/asm/arch-rockchip/periph.h
create mode 100644 arch/arm/include/asm/arch-rockchip/pmu_rk3288.h
create mode 100644 arch/arm/include/asm/arch-rockchip/sdram.h
create mode 100644 arch/arm/mach-rockchip/Kconfig
create mode 100644 arch/arm/mach-rockchip/Makefile
create mode 100644 arch/arm/mach-rockchip/board-spl.c
create mode 100644 arch/arm/mach-rockchip/board.c
create mode 100644 arch/arm/mach-rockchip/common.c
create mode 100644 arch/arm/mach-rockchip/rk3288/Kconfig
create mode 100644 arch/arm/mach-rockchip/rk3288/Makefile
create mode 100644 arch/arm/mach-rockchip/rk3288/reset_rk3288.c
create mode 100644 arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
create mode 100644 arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
create mode 100644 board/firefly/firefly-rk3288/Kconfig
create mode 100644 board/firefly/firefly-rk3288/MAINTAINERS
create mode 100644 board/firefly/firefly-rk3288/Makefile
create mode 100644 board/firefly/firefly-rk3288/firefly-rk3288.c
create mode 100644 board/google/chromebook_jerry/Kconfig
create mode 100644 board/google/chromebook_jerry/MAINTAINERS
create mode 100644 board/google/chromebook_jerry/Makefile
create mode 100644 board/google/chromebook_jerry/jerry.c
create mode 100644 configs/chromebook_jerry_defconfig
create mode 100644 configs/firefly-rk3288_defconfig
create mode 100644 doc/README.rockchip
create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt
create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt
create mode 100644 doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt
create mode 100644 doc/device-tree-bindings/clock/rockchip.txt
create mode 100644 doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt
create mode 100644 doc/device-tree-bindings/thermal/rockchip-thermal.txt
create mode 100644 drivers/clk/clk_rk3288.c
create mode 100644 drivers/gpio/rk_gpio.c
create mode 100644 drivers/i2c/rk_i2c.c
create mode 100644 drivers/mmc/rockchip_mmc.c
create mode 100644 drivers/pinctrl/rockchip/Makefile
create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3288.c
create mode 100644 drivers/power/pmic/act8846.c
create mode 100644 drivers/power/regulator/act8846.c
create mode 100644 drivers/serial/serial_rockchip.c
create mode 100644 drivers/spi/rk_spi.c
create mode 100644 drivers/spi/rk_spi.h
create mode 100644 include/configs/chromebook_jerry.h
create mode 100644 include/configs/firefly-rk3288.h
create mode 100644 include/configs/rk3288_common.h
create mode 100644 include/dt-bindings/clock/rk3288-cru.h
create mode 100644 include/dt-bindings/clock/rockchip,rk808.h
create mode 100644 include/dt-bindings/pinctrl/rockchip.h
create mode 100644 include/dt-bindings/power-domain/rk3288.h
create mode 100644 include/power/act8846_pmic.h
create mode 100644 tools/rkcommon.c
create mode 100644 tools/rkcommon.h
create mode 100644 tools/rkimage.c
create mode 100644 tools/rksd.c
create mode 100644 tools/rkspi.c
--
2.5.0.457.gab17608
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