Hi Stefan, On 10/26/2015 03:36 AM, Stefan Roese wrote: > The SR1500 board is a CycloneV based board, similar to the EBV > SoCrates, equipped with the following devices: > > - SPI NOR > - eMMC > - Ethernet > > Signed-off-by: Stefan Roese <s...@denx.de> > Cc: Marek Vasut <ma...@denx.de> > Cc: Pavel Machek <pa...@denx.de> > Cc: Dinh Nguyen <dingu...@opensource.altera.com> > --- > v2: > - Addressed various review comments from Marek: > - Added chapter about SPL integration for SoC FPGA in doc/README.socfpga > - Delay after PHY reset deassertion added > - Reshuffle of the code for the PHY test code (fixes and cleanup) > - Cleanup of the board config header > > arch/arm/dts/Makefile | 4 +- > arch/arm/dts/socfpga_cyclone5_sr1500.dts | 101 +++++ > arch/arm/mach-socfpga/Kconfig | 6 + > board/sr1500/MAINTAINERS | 6 + > board/sr1500/Makefile | 7 + > board/sr1500/qts/iocsr_config.h | 660 > +++++++++++++++++++++++++++++++ > board/sr1500/qts/pinmux_config.h | 219 ++++++++++ > board/sr1500/qts/pll_config.h | 85 ++++ > board/sr1500/qts/sdram_config.h | 341 ++++++++++++++++ > board/sr1500/socfpga.c | 151 +++++++ > configs/socfpga_sr1500_defconfig | 17 + > doc/README.socfpga | 74 +++- > include/configs/socfpga_sr1500.h | 113 ++++++ > 13 files changed, 1782 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/dts/socfpga_cyclone5_sr1500.dts > create mode 100644 board/sr1500/MAINTAINERS > create mode 100644 board/sr1500/Makefile > create mode 100644 board/sr1500/qts/iocsr_config.h > create mode 100644 board/sr1500/qts/pinmux_config.h > create mode 100644 board/sr1500/qts/pll_config.h > create mode 100644 board/sr1500/qts/sdram_config.h > create mode 100644 board/sr1500/socfpga.c > create mode 100644 configs/socfpga_sr1500_defconfig > create mode 100644 include/configs/socfpga_sr1500.h >
> diff --git a/include/configs/socfpga_sr1500.h > b/include/configs/socfpga_sr1500.h > new file mode 100644 > index 0000000..def01fb > --- /dev/null > +++ b/include/configs/socfpga_sr1500.h > @@ -0,0 +1,113 @@ > +/* > + * Copyright (C) 2015 Stefan Roese <s...@denx.de> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > +#ifndef __CONFIG_SOCFPGA_SR1500_H__ > +#define __CONFIG_SOCFPGA_SR1500_H__ > + > +#include <asm/arch/socfpga_base_addrs.h> > + > +#define CONFIG_BOARD_EARLY_INIT_F > + > +#define CONFIG_SYS_NO_FLASH > +#define CONFIG_DOS_PARTITION > +#define CONFIG_FAT_WRITE > + > +#define CONFIG_HW_WATCHDOG > + > +/* U-Boot Commands */ > +#define CONFIG_CMD_ASKENV > +#define CONFIG_CMD_BOOTZ > +#define CONFIG_CMD_CACHE > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_EXT4 > +#define CONFIG_CMD_EXT4_WRITE > +#define CONFIG_CMD_FAT > +#define CONFIG_CMD_FS_GENERIC > +#define CONFIG_CMD_GPIO > +#define CONFIG_CMD_GREPENV > +#define CONFIG_CMD_MEMTEST > +#define CONFIG_CMD_MII > +#define CONFIG_CMD_MMC > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_SF > +#define CONFIG_CMD_SPI > +#define CONFIG_CMD_TIME > + > +/* Memory configurations */ > +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */ > + > +/* Booting Linux */ > +#define CONFIG_BOOTDELAY 3 > +#define CONFIG_BOOTFILE "uImage" > +#define CONFIG_BOOTARGS "console=ttyS0" > __stringify(CONFIG_BAUDRATE) > +#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" > +#define CONFIG_LOADADDR 0x8000 All of the other boards have switched to use 0x01000000 as the LOADADDR. Dinh _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
