On Fri, Aug 07, 2015 at 02:28:46AM -0700, Bin Meng wrote:

> Intel FSP has the capability to walk through the microcode blocks
> which are passed as the TempRamInit() parameter from U-Boot and
> finds the most appropriate microcode which is suitable for the cpu
> on which it is running. Now we've seen several steppings for Intel
> BayTrail series processors, adding those microcodes to the Intel
> BayleyBay and MinnowMax board device tree files.
> 
> Signed-off-by: Bin Meng <bmeng...@gmail.com>

With my Minnowboard Max that doesn't work in mainline right now due to
newer stepping and thus needing newer microcode:

Tested-by: Tom Rini <tr...@konsulko.com>

-- 
Tom

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