This patch adds and uses common code for all Matrix Vision boards.
Signed-off-by: André Schwarz <andre.schw...@matrix-vision.de>
---
Heiko's comments have been addressed and common/mv_common.h has been
included where needed.
board/matrix_vision/common/Makefile | 54 ++++++++++++++
board/matrix_vision/common/mv_common.c | 125
++++++++++++++++++++++++++++++++
board/matrix_vision/common/mv_common.h | 25 +++++++
board/matrix_vision/mvbc_p/mvbc_p.c | 76 +-------------------
board/matrix_vision/mvblm7/mvblm7.c | 38 +++-------
board/matrix_vision/mvblm7/pci.c | 35 ++--------
include/configs/MVBC_P.h | 14 +++-
include/configs/MVBLM7.h | 49 +++++--------
8 files changed, 254 insertions(+), 162 deletions(-)
diff --git a/board/matrix_vision/common/Makefile
b/board/matrix_vision/common/Makefile
new file mode 100644
index 0000000..b496258
--- /dev/null
+++ b/board/matrix_vision/common/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB = $(obj)lib$(VENDOR).a
+
+COBJS-y = mv_common.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/matrix_vision/common/mv_common.c
b/board/matrix_vision/common/mv_common.c
new file mode 100644
index 0000000..284de16
--- /dev/null
+++ b/board/matrix_vision/common/mv_common.c
@@ -0,0 +1,125 @@
+/*
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schw...@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <environment.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static char* entries_to_keep[] = {
+ "serial#", "ethaddr", "eth1addr", "model_info", "sensor_cnt",
+ "fpgadatasize", "ddr_size", "use_dhcp", "use_static_ipaddr",
+ "static_ipaddr", "static_netmask", "static_gateway",
+ "syslog", "watchdog", "netboot", "evo8serialnumber" };
+
+#define MV_MAX_ENV_ENTRY_LENGTH 64
+#define MV_KEEP_ENTRIES ARRAY_SIZE(entries_to_keep)
+
+void mv_reset_environment(void)
+{
+ int i;
+ char *s[MV_KEEP_ENTRIES];
+ char entries[MV_KEEP_ENTRIES][MV_MAX_ENV_ENTRY_LENGTH];
+
+ printf("\n*** RESET ENVIRONMENT ***\n");
+
+ memset(entries, 0, MV_KEEP_ENTRIES * MV_MAX_ENV_ENTRY_LENGTH);
+ for (i = 0; i < MV_KEEP_ENTRIES; i++) {
+ s[i] = getenv(entries_to_keep[i]);
+ if (s[i]) {
+ printf("save '%s' : %s\n", entries_to_keep[i], s[i]);
+ strncpy(entries[i], s[i], MV_MAX_ENV_ENTRY_LENGTH);
+ }
+ }
+
+ gd->env_valid = 0;
+ env_relocate();
+
+ for (i = 0; i < MV_KEEP_ENTRIES; i++) {
+ if (s[i]) {
+ printf("restore '%s' : %s\n", entries_to_keep[i], s[i]);
+ setenv(entries_to_keep[i], s[i]);
+ }
+ }
+
+ saveenv();
+}
+
+int mv_load_fpga(void)
+{
+ int result;
+ size_t data_size = 0;
+ void *fpga_data = NULL;
+ char *datastr = getenv("fpgadata");
+ char *sizestr = getenv("fpgadatasize");
+
+ if (getenv("skip_fpga")) {
+ printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
+ return -1;
+ }
+ printf("loading FPGA\n");
+
+ if (datastr)
+ fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
+ if (sizestr)
+ data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
+ if (!data_size) {
+ printf("fpgadatasize invalid -> FPGA _not_ loaded !\n");
+ return -1;
+ }
+
+ result = fpga_load(0, fpga_data, data_size);
+ if (!result)
+ show_boot_progress(0);
+
+ return result;
+}
+
+u8 *dhcp_vendorex_prep(u8 *e)
+{
+ char *ptr;
+
+ /* DHCP vendor-class-identifier = 60 */
+ if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
+ *e++ = 60;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+ /* DHCP_CLIENT_IDENTIFIER = 61 */
+ if ((ptr = getenv("dhcp_client_id"))) {
+ *e++ = 61;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+
+ return e;
+}
+
+u8 *dhcp_vendorex_proc(u8 *popt)
+{
+ return NULL;
+}
diff --git a/board/matrix_vision/common/mv_common.h
b/board/matrix_vision/common/mv_common.h
new file mode 100644
index 0000000..046c038
--- /dev/null
+++ b/board/matrix_vision/common/mv_common.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2008 Matrix Vision GmbH
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+extern int mv_load_fpga(void);
+extern void mv_reset_environment(void);
diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c
b/board/matrix_vision/mvbc_p/mvbc_p.c
index a300342..4ebe185 100644
--- a/board/matrix_vision/mvbc_p/mvbc_p.c
+++ b/board/matrix_vision/mvbc_p/mvbc_p.c
@@ -39,6 +39,7 @@
#include <asm/io.h>
#include "fpga.h"
#include "mvbc_p.h"
+#include "../common/mv_common.h"
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x504F0000
@@ -134,23 +135,6 @@ void mvbc_init_gpio(void)
printf("sint_gpioe : 0x%08x\n", gpio->sint_gpioe);
}
-void reset_environment(void)
-{
- char *s, sernr[64];
-
- printf("\n*** RESET ENVIRONMENT ***\n");
- memset(sernr, 0, sizeof(sernr));
- s = getenv("serial#");
- if (s) {
- printf("found serial# : %s\n", s);
- strncpy(sernr, s, 64);
- }
- gd->env_valid = 0;
- env_relocate();
- if (s)
- setenv("serial#", sernr);
-}
-
int misc_init_r(void)
{
char *s = getenv("reset_env");
@@ -166,7 +150,7 @@ int misc_init_r(void)
return 0;
}
printf(" === FACTORY RESET ===\n");
- reset_environment();
+ mv_reset_environment();
saveenv();
return -1;
@@ -234,69 +218,15 @@ struct pci_controller hose = {
fixup_irq:pci_mvbc_fixup_irq
};
-int mvbc_p_load_fpga(void)
-{
- size_t data_size = 0;
- void *fpga_data = NULL;
- char *datastr = getenv("fpgadata");
- char *sizestr = getenv("fpgadatasize");
-
- if (datastr)
- fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
- if (sizestr)
- data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
-
- return fpga_load(0, fpga_data, data_size);
-}
-
extern void pci_mpc5xxx_init(struct pci_controller *);
void pci_init_board(void)
{
- char *s;
- int load_fpga = 1;
-
mvbc_p_init_fpga();
- s = getenv("skip_fpga");
- if (s) {
- printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
- load_fpga = 0;
- }
- if (load_fpga) {
- printf("loading FPGA ... ");
- mvbc_p_load_fpga();
- printf("done\n");
- }
+ mv_load_fpga();
pci_mpc5xxx_init(&hose);
}
-u8 *dhcp_vendorex_prep(u8 *e)
-{
- char *ptr;
-
- /* DHCP vendor-class-identifier = 60 */
- if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
- *e++ = 60;
- *e++ = strlen(ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
- /* DHCP_CLIENT_IDENTIFIER = 61 */
- if ((ptr = getenv("dhcp_client_id"))) {
- *e++ = 61;
- *e++ = strlen(ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
-
- return e;
-}
-
-u8 *dhcp_vendorex_proc (u8 *popt)
-{
- return NULL;
-}
-
void show_boot_progress(int val)
{
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
diff --git a/board/matrix_vision/mvblm7/mvblm7.c
b/board/matrix_vision/mvblm7/mvblm7.c
index 6984af9..2cecd1f 100644
--- a/board/matrix_vision/mvblm7/mvblm7.c
+++ b/board/matrix_vision/mvblm7/mvblm7.c
@@ -64,7 +64,7 @@ int fixed_sdram(void)
im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
- im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
+ im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
udelay(300);
@@ -88,40 +88,22 @@ phys_size_t initdram(int board_type)
return msize * 1024 * 1024;
}
-int checkboard(void)
+int misc_init_r(void)
{
- puts("Board: Matrix Vision mvBlueLYNX-M7\n");
-
- return 0;
-}
+ char *s = getenv("reset_env");
-u8 *dhcp_vendorex_prep(u8 *e)
-{
- char *ptr;
-
- /* DHCP vendor-class-identifier = 60 */
- ptr = getenv("dhcp_vendor-class-identifier");
- if (ptr) {
- *e++ = 60;
- *e++ = strlen(ptr);
- while (*ptr)
- *e++ = *ptr++;
- }
- /* DHCP_CLIENT_IDENTIFIER = 61 */
- ptr = getenv("dhcp_client_id");
- if (ptr) {
- *e++ = 61;
- *e++ = strlen(ptr);
- while (*ptr)
- *e++ = *ptr++;
+ if (s) {
+ mv_reset_environment();
}
- return e;
+ return 0;
}
-u8 *dhcp_vendorex_proc(u8 *popt)
+int checkboard(void)
{
- return NULL;
+ puts("Board: Matrix Vision mvBlueLYNX-M7\n");
+
+ return 0;
}
#ifdef CONFIG_HARD_SPI
diff --git a/board/matrix_vision/mvblm7/pci.c
b/board/matrix_vision/mvblm7/pci.c
index 9f31719..2db51f1 100644
--- a/board/matrix_vision/mvblm7/pci.c
+++ b/board/matrix_vision/mvblm7/pci.c
@@ -32,24 +32,10 @@
#include <fpga.h>
#include "mvblm7.h"
#include "fpga.h"
+#include "../common/mv_common.h"
DECLARE_GLOBAL_DATA_PTR;
-int mvblm7_load_fpga(void)
-{
- size_t data_size = 0;
- void *fpga_data = NULL;
- char *datastr = getenv("fpgadata");
- char *sizestr = getenv("fpgadatasize");
-
- if (datastr)
- fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
- if (sizestr)
- data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
-
- return fpga_load(0, fpga_data, data_size);
-}
-
static struct pci_region pci_regions[] = {
{
bus_start: CONFIG_SYS_PCI1_MEM_BASE,
@@ -73,10 +59,8 @@ static struct pci_region pci_regions[] = {
void pci_init_board(void)
{
- char *s;
int i;
int warmboot;
- int load_fpga;
volatile immap_t *immr;
volatile pcictrl83xx_t *pci_ctrl;
volatile gpio83xx_t *gpio;
@@ -84,32 +68,23 @@ void pci_init_board(void)
volatile law83xx_t *pci_law;
struct pci_region *reg[] = { pci_regions };
- load_fpga = 1;
immr = (immap_t *) CONFIG_SYS_IMMR;
clk = (clk83xx_t *) &immr->clk;
pci_ctrl = immr->pci_ctrl;
pci_law = immr->sysconf.pcilaw;
gpio = (volatile gpio83xx_t *)&immr->gpio[0];
- s = getenv("skip_fpga");
- if (s) {
- printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
- load_fpga = 0;
- }
-
gpio->dat = MV_GPIO_DAT;
gpio->odr = MV_GPIO_ODE;
- if (load_fpga)
- gpio->dir = MV_GPIO_OUT;
- else
- gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK);
+ gpio->dir = MV_GPIO_OUT;
printf("SICRH / SICRL : 0x%08x / 0x%08x\n", immr->sysconf.sicrh,
immr->sysconf.sicrl);
mvblm7_init_fpga();
- if (load_fpga)
- mvblm7_load_fpga();
+ mv_load_fpga();
+
+ gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK);
/* Enable PCI_CLK_OUTPUTs 0 and 1 with 1:1 clocking */
clk->occr = 0xc0000000;
diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h
index edbc701..867e8e0 100644
--- a/include/configs/MVBC_P.h
+++ b/include/configs/MVBC_P.h
@@ -68,9 +68,9 @@
#define MV_VCI mvBlueCOUGAR-P
#define MV_FPGA_DATA 0xff860000
#define MV_FPGA_SIZE 0x0003c886
-#define MV_KERNEL_ADDR 0xffc00000
+#define MV_KERNEL_ADDR 0xffd00000
#define MV_INITRD_ADDR 0xff900000
-#define MV_INITRD_LENGTH 0x00300000
+#define MV_INITRD_LENGTH 0x00400000
#define MV_SCRATCH_ADDR 0x00000000
#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
#define MV_SOURCE_ADDR 0xff840000
@@ -105,6 +105,7 @@
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_PCI
#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_I2C
#undef CONFIG_WATCHDOG
@@ -182,6 +183,7 @@
"propdev_debug=0\0" \
"gevss_debug=0\0" \
"watchdog=1\0" \
+ "sensor_cnt=1\0" \
""
#undef XMK_STR
@@ -249,6 +251,14 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_MODULE 1
+#define CONFIG_SYS_I2C_SPEED 86000
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+
+/*
* Ethernet configuration
*/
#define CONFIG_NET_MULTI
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index ac8cb57..3e3a2c0 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -47,10 +47,9 @@
#define CONFIG_MPC8XXX_SPI
#define CONFIG_HARD_SPI
#define MVBLM7_MMC_CS 0x04000000
+#define CONFIG_MISC_INIT_R
/* I2C */
-#undef CONFIG_SOFT_I2C
-
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_OFFSET 0x3000
@@ -62,44 +61,36 @@
/*
* DDR Setup
*/
+#undef CONFIG_SPD_EEPROM
+
#define CONFIG_SYS_DDR_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
#define CONFIG_SYS_83XX_DDR_USES_CS0 1
#define CONFIG_SYS_MEMTEST_START (60<<20)
#define CONFIG_SYS_MEMTEST_END (70<<20)
+#define CONFIG_VERY_BIG_RAM
-#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
- DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
-
-#define CONFIG_SYS_DDR_SIZE 256
+#define CONFIG_SYS_DDRCDR 0x22000001
+#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
-/* HC, 75Ohm, DDR-II, DRQ */
-#define CONFIG_SYS_DDRCDR 0x80000001
-/* EN, ODT_WR, 3BA, 14row, 10col */
-#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014102
-#define CONFIG_SYS_DDR_CS1_CONFIG 0x0
-#define CONFIG_SYS_DDR_CS2_CONFIG 0x0
-#define CONFIG_SYS_DDR_CS3_CONFIG 0x0
+#define CONFIG_SYS_DDR_SIZE 512
-#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f
-#define CONFIG_SYS_DDR_CS1_BNDS 0x0
-#define CONFIG_SYS_DDR_CS2_BNDS 0x0
-#define CONFIG_SYS_DDR_CS3_BNDS 0x0
+#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
+#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
-#define CONFIG_SYS_DDR_TIMING_0 0x00260802
-#define CONFIG_SYS_DDR_TIMING_1 0x2625b221
-#define CONFIG_SYS_DDR_TIMING_2 0x1f9820c7
-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
+#define CONFIG_SYS_DDR_TIMING_0 0x00260802
+#define CONFIG_SYS_DDR_TIMING_1 0x3837c322
+#define CONFIG_SYS_DDR_TIMING_2 0x0f9848c6
+#define CONFIG_SYS_DDR_TIMING_3 0x00000000
-/* ~MEM_EN, SREN, DDR-II, 32_BE */
-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080000
+#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080008
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#define CONFIG_SYS_DDR_INTERVAL 0x04060100
+#define CONFIG_SYS_DDR_INTERVAL 0x02000100
-#define CONFIG_SYS_DDR_MODE 0x078e0232
+#define CONFIG_SYS_DDR_MODE 0x04040242
+#define CONFIG_SYS_DDR_MODE2 0x00800000
/* Flash */
#define CONFIG_SYS_FLASH_CFI
@@ -405,8 +396,8 @@
#define MV_CI mvBL-M7
#define MV_VCI mvBL-M7
-#define MV_FPGA_DATA 0xfff80000
-#define MV_FPGA_SIZE 0x00076ca2
+#define MV_FPGA_DATA 0xfff40000
+#define MV_FPGA_SIZE 0
#define MV_KERNEL_ADDR 0xff810000
#define MV_INITRD_ADDR 0xffb00000
#define MV_SOURCE_ADDR 0xff804000
@@ -453,7 +444,7 @@
"static_ipaddr=192.168.90.10\0" \
"static_netmask=255.255.255.0\0" \
"static_gateway=0.0.0.0\0" \
- "initrd_name=uInitrd.mvblm7-xenorfs\0" \
+ "initrd_name=uInitrd.mvBL-M7-rfs\0" \
"zcip=no\0" \
"netboot=yes\0" \
"mvtest=Ff\0" \
MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschiaeftsf�hrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner,
Hans-Joachim Reich
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