Hi Nikita,
On 07/23/15 17:19, Nikita Kiryanov wrote:
> U-Boot does not explicitly assign the display to an IPU interface. Instead, it
> relies on the power-on default of DI0.
>
> Since the kernel reassigns HDMI display to DI1, after a warm reset the HDMI
> display no longer works in U-Boot.
>
> Fix this by explicitly assigning HDMI to IPU1 DI0 in U-Boot.
>
> Cc: Stefano Babic <sba...@denx.de>
> Cc: Igor Grinberg <grinb...@compulab.co.il>
> Signed-off-by: Nikita Kiryanov <nik...@compulab.co.il>
> ---
> board/compulab/cm_fx6/cm_fx6.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
> index 7a1bbaf..b500f91 100644
> --- a/board/compulab/cm_fx6/cm_fx6.c
> +++ b/board/compulab/cm_fx6/cm_fx6.c
> @@ -83,6 +83,7 @@ size_t display_count = ARRAY_SIZE(displays);
> static void cm_fx6_setup_display(void)
> {
> struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
> int reg;
>
> enable_ipu_clock();
> @@ -90,6 +91,7 @@ static void cm_fx6_setup_display(void)
> reg = __raw_readl(&mxc_ccm->CCGR3);
> reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK;
> writel(reg, &mxc_ccm->CCGR3);
> + clrbits_le32(&iomuxc_regs->gpr[3], MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK);
I would like to see this done through a display framework of some kind...
But since there none...
Acked-by: Igor Grinberg <grinb...@compulab.co.il>
> }
> #else
> static inline void cm_fx6_setup_display(void) {}
>
--
Regards,
Igor.
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