On 07/22/2015 12:23 PM, Alexander Stein wrote: > The cacheline is always 32 bytes for arm1176 CPUs, so define it at board > config level for cache handling code.
> include/configs/rpi-common.h | 1 + This file applies to both RPi 1 and RPi 2. Do they have the same cacheline size? _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
