From: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Tom Warren <twar...@nvidia.com>
[swarren, stripped out changes not strictly related to warnings]
Signed-off-by: Stephen Warren <swar...@nvidia.com>
---
Tom, if you look at https://github.com/swarren/u-boot/tree/t210-testing
you'll see commit "ARM: tegra: parts of 64-bit port". Those changes were
originally included in Thierry's version of this patch, but aren't
strictly related to build warnings. I separated them out to keep warning
fixes and 64-bit support separate. I think you should squash "ARM: tegra:
parts of 64-bit port" into your T210 support series. Does that seem
reasonable?
arch/arm/mach-tegra/ap.c | 4 ++--
arch/arm/mach-tegra/pinmux-common.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 0b94e8aaf9c3..7b89c0107196 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -131,8 +131,8 @@ static u32 get_odmdata(void)
* on BCTs for currently supported SoCs, which are locked down.
* If this changes in new chips, we can revisit this algorithm.
*/
-
- u32 bct_start, odmdata;
+ unsigned long bct_start;
+ u32 odmdata;
bct_start = readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BCTPTR);
odmdata = readl(bct_start + BCT_ODMDATA_OFFSET);
diff --git a/arch/arm/mach-tegra/pinmux-common.c
b/arch/arm/mach-tegra/pinmux-common.c
index b4a1432afcb1..5862c4ac3dc6 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -78,7 +78,7 @@
(((hsm) >= PMUX_HSM_DISABLE) && ((hsm) <= PMUX_HSM_ENABLE))
#endif
-#define _R(offset) (u32 *)(NV_PA_APB_MISC_BASE + (offset))
+#define _R(offset) (u32 *)((unsigned long)NV_PA_APB_MISC_BASE + (offset))
#if defined(CONFIG_TEGRA20)
--
1.9.1
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