> > Hmm, not sure yet what causes the problem here, but this changes in > > cpu/ppc4xx/start.S look fishy...
I found that the old code does not clear TLB entry #0. So this helps in my case: diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index ac96fc2..7be73a7 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -452,7 +452,7 @@ skip_debug_init: addis r0,0,0x0000 li r1,0x003f /* 64 TLB entries */ mtctr r1 - li r4,0 /* Start with TLB #0 */ + li r4,1 /* Start with TLB #1 */ rsttlb: #ifdef CONFIG_SYS_RAMBOOT tlbre r3,r4,0 /* Read contents from TLB word #0 to get EPN */ But I am not sure if it's also correct for the RAMBOOT case. What's your opinion, Stefan? Cheers Dirk _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot