The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code and likely to be a bit incomplete. GPIO pins are configured,
but much of it is not really tested.

Signed-off-by: Simon Kagstrom <simon.kagst...@netinsight.net>
---
 MAINTAINERS                             |    4 +
 MAKEALL                                 |    1 +
 Makefile                                |    3 +
 board/Marvell/openrd_base/Makefile      |   51 +++++++
 board/Marvell/openrd_base/config.mk     |   25 ++++
 board/Marvell/openrd_base/openrd_base.c |  137 ++++++++++++++++++
 board/Marvell/openrd_base/openrd_base.h |   38 +++++
 drivers/net/phy/mv88e1116.c             |    2 +-
 include/configs/openrd_base.h           |  230 +++++++++++++++++++++++++++++++
 9 files changed, 490 insertions(+), 1 deletions(-)
 create mode 100644 board/Marvell/openrd_base/Makefile
 create mode 100644 board/Marvell/openrd_base/config.mk
 create mode 100644 board/Marvell/openrd_base/openrd_base.c
 create mode 100644 board/Marvell/openrd_base/openrd_base.h
 create mode 100644 include/configs/openrd_base.h

diff --git a/MAINTAINERS b/MAINTAINERS
index dfdcc2e..6f8cce3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -559,6 +559,10 @@ Gary Jennejohn <ga...@denx.de>
 Konstantin Kletschke <kletsc...@synertronixx.de>
        scb9328         ARM920T
 
+Simon Kagstrom <simon.kagst...@netinsight.net>
+
+       openrd_base     ARM926EJS (Kirkwood SoC)
+
 Nishant Kamat <nska...@ti.com>
 
        omap1610h2      ARM926EJS
diff --git a/MAKEALL b/MAKEALL
index e28df35..ddff76c 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -518,6 +518,7 @@ LIST_ARM9="                 \
        omap1610inn             \
        omap5912osk             \
        omap730p2               \
+       openrd_base             \
        sbc2410x                \
        scb9328                 \
        sheevaplug              \
diff --git a/Makefile b/Makefile
index 1515de6..d1ecd1e 100644
--- a/Makefile
+++ b/Makefile
@@ -2897,6 +2897,9 @@ omap1610h2_cs_autoboot_config:    unconfig
 omap5912osk_config :   unconfig
        @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
 
+openrd_base_config: unconfig
+       @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 
 omap730p2_config \
diff --git a/board/Marvell/openrd_base/Makefile 
b/board/Marvell/openrd_base/Makefile
new file mode 100644
index 0000000..defbb08
--- /dev/null
+++ b/board/Marvell/openrd_base/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).a
+
+COBJS  := openrd_base.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/openrd_base/config.mk 
b/board/Marvell/openrd_base/config.mk
new file mode 100644
index 0000000..a4ea769
--- /dev/null
+++ b/board/Marvell/openrd_base/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
diff --git a/board/Marvell/openrd_base/openrd_base.c 
b/board/Marvell/openrd_base/openrd_base.c
new file mode 100644
index 0000000..a3ebf2f
--- /dev/null
+++ b/board/Marvell/openrd_base/openrd_base.c
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2009
+ * Net Insight <www.netinsight.net>
+ * Written-by: Simon Kagstrom <simon.kagst...@netinsight.net>
+ *
+ * Based on sheevaplug.c:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include <mv88e1116.h>
+#include "openrd_base.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+       /*
+        * default gpio configuration
+        * There are maximum 64 gpios controlled through 2 sets of registers
+        * the  below configuration configures mainly initial LED status
+        */
+       kw_config_gpio(OPENRD_OE_VAL_LOW,
+                       OPENRD_OE_VAL_HIGH,
+                       OPENRD_OE_LOW, OPENRD_OE_HIGH);
+
+       /* Multi-Purpose Pins Functionality configuration */
+       u32 kwmpp_config[] = {
+               MPP0_NF_IO2,
+               MPP1_NF_IO3,
+               MPP2_NF_IO4,
+               MPP3_NF_IO5,
+               MPP4_NF_IO6,
+               MPP5_NF_IO7,
+               MPP6_SYSRST_OUTn,
+               MPP7_GPO,
+               MPP8_TW_SDA,
+               MPP9_TW_SCK,
+               MPP10_UART0_TXD,
+               MPP11_UART0_RXD,
+               MPP12_SD_CLK,
+               MPP13_SD_CMD, /* Alt UART1_TXD */
+               MPP14_SD_D0,  /* Alt UART1_RXD */
+               MPP15_SD_D1,
+               MPP16_SD_D2,
+               MPP17_SD_D3,
+               MPP18_NF_IO0,
+               MPP19_NF_IO1,
+               MPP20_GE1_0,
+               MPP21_GE1_1,
+               MPP22_GE1_2,
+               MPP23_GE1_3,
+               MPP24_GE1_4,
+               MPP25_GE1_5,
+               MPP26_GE1_6,
+               MPP27_GE1_7,
+               MPP28_GPIO,
+               MPP29_TSMP9,
+               MPP30_GE1_10,
+               MPP31_GE1_11,
+               MPP32_GE1_12,
+               MPP33_GE1_13,
+               MPP34_GPIO,   /* UART1 / SD sel */
+               MPP35_TDM_CH0_TX_QL,
+               MPP36_TDM_SPI_CS1,
+               MPP37_TDM_CH2_TX_QL,
+               MPP38_TDM_CH2_RX_QL,
+               MPP39_AUDIO_I2SBCLK,
+               MPP40_AUDIO_I2SDO,
+               MPP41_AUDIO_I2SLRC,
+               MPP42_AUDIO_I2SMCLK,
+               MPP43_AUDIO_I2SDI,
+               MPP44_AUDIO_EXTCLK,
+               MPP45_TDM_PCLK,
+               MPP46_TDM_FS,
+               MPP47_TDM_DRX,
+               MPP48_TDM_DTX,
+               MPP49_TDM_CH0_RX_QL,
+               0
+       };
+       kirkwood_mpp_conf(kwmpp_config);
+
+       /*
+        * arch number of board
+        */
+       gd->bd->bi_arch_number = MACH_TYPE_OPENRD_BASE;
+
+       /* adress of boot parameters */
+       gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+       return 0;
+}
+
+int dram_init(void)
+{
+       int i;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               gd->bd->bi_dram[i].start = kw_sdram_bar(i);
+               gd->bd->bi_dram[i].size = kw_sdram_bs(i);
+       }
+       return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+       /* Configure and enable MV88E1116 PHY */
+       mv881116_reset_phy("egiga0");
+
+       /* Make sure Linux gets the MAC address */
+       eth_init(gd->bd);
+
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/openrd_base/openrd_base.h 
b/board/Marvell/openrd_base/openrd_base.h
new file mode 100644
index 0000000..bf2abca
--- /dev/null
+++ b/board/Marvell/openrd_base/openrd_base.h
@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2009
+ * Net Insight <www.netinsight.net>
+ * Written-by: Simon Kagstrom <simon.kagst...@netinsight.net>
+ *
+ * Based on sheevaplug.h:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __OPENRD_BASE_H
+#define __OPENRD_BASE_H
+
+#define OPENRD_OE_LOW          (~(1<<28))        /* RS232 / RS485 */
+#define OPENRD_OE_HIGH         (~(1<<2))         /* SD / UART1 */
+#define OPENRD_OE_VAL_LOW              (0)       /* Sel RS232 */
+#define OPENRD_OE_VAL_HIGH             (1 << 2)  /* Sel SD */
+
+#endif /* __OPENRD_BASE_H */
diff --git a/drivers/net/phy/mv88e1116.c b/drivers/net/phy/mv88e1116.c
index 37225f3..3562834 100644
--- a/drivers/net/phy/mv88e1116.c
+++ b/drivers/net/phy/mv88e1116.c
@@ -24,7 +24,7 @@
  */
 #include <common.h>
 #include <miiphy.h>
-#include "mv881116.h"
+#include "mv88e1116.h"
 
 /* PHY related */
 #define MV88E1116_LED_FCTRL_REG                10
diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h
new file mode 100644
index 0000000..37c87b3
--- /dev/null
+++ b/include/configs/openrd_base.h
@@ -0,0 +1,230 @@
+/*
+ * (C) Copyright 2009
+ * Net Insight <www.netinsight.net>
+ * Written-by: Simon Kagstrom <simon.kagst...@netinsight.net>
+ *
+ * Based on sheevaplug.h:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_OPENRD_BASE_H
+#define _CONFIG_OPENRD_BASE_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING    "\nMarvell-OpenRD_base"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL         1
+#define CONFIG_ARM926EJS       1       /* Basic Architecture */
+#define CONFIG_FEROCEON_88FR131        1       /* CPU Core subversion */
+#define CONFIG_KIRKWOOD                1       /* SOC Family Name */
+#define CONFIG_KW88F6281       1       /* SOC Name */
+#define CONFIG_MACH_OPENRD_BASE        /* Machine type */
+
+#define CONFIG_MD5     /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_SKIP_LOWLEVEL_INIT      /* disable board lowlevel_init */
+#define CONFIG_KIRKWOOD_EGIGA_INIT     /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
+#define CONFIG_MV88E1116               /* Support for the MV88E1116 PHY */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ          1000
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
+#define CONFIG_SYS_NS16550_CLK         CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1                KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX      1       /*Console on UART0 */
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, \
+                                         115200,230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY       3       /* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG     1       /* enable passing of ATAGs  */
+#define CONFIG_INITRD_TAG      1       /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1     /* enable memory tag */
+
+#define        CONFIG_SYS_PROMPT       "Marvell>> "    /* Command Prompt */
+#define        CONFIG_SYS_CBSIZE       1024    /* Console I/O Buff Size */
+#define        CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE \
+               +sizeof(CONFIG_SYS_PROMPT) + 16)        /* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_USB
+
+/*
+ * Flash configuration
+ */
+#ifndef CONFIG_CMD_FLASH
+#define CONFIG_SYS_NO_FLASH            1       /* Declare no flash (NOR/SPI) */
+#endif
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_KIRKWOOD
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define NAND_MAX_CHIPS                 1
+#define CONFIG_SYS_NAND_BASE           0xD8000000      /* KW_DEFADR_NANDF */
+#define NAND_ALLOW_ERASE_ALL           1
+#endif
+
+/*
+ *  Environment variables configurations
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND          1
+#define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K */
+#else
+#define CONFIG_ENV_IS_NOWHERE          1       /* if env in SDRAM */
+#endif
+/*
+ * max 4k env size is enough, but in case of nand
+ * it has to be rounded to sector size
+ */
+#define CONFIG_ENV_SIZE                        0x20000 /* 128k */
+#define CONFIG_ENV_ADDR                        0xa0000
+#define CONFIG_ENV_OFFSET              0xa0000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND             "${x_bootcmd_kernel}; " \
+       "setenv bootargs ${x_bootargs} ${x_bootargs_root}; "    \
+       "${x_bootcmd_usb}; bootm 0x6400000;"
+
+#define MTDIDS_DEFAULT         "nand0=nand_mtd"
+#define MTDPARTS_DEFAULT       
"mtdparts=nand_mtd:0x100...@0x000000(uboot),0x400...@0x100000(uImage),"\
+       "0x1fb00...@0x500000(rootfs)"
+
+#define CONFIG_EXTRA_ENV_SETTINGS      "x_bootargs=console"    \
+       "=ttyS0,115200 "MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \
+       "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \
+       "x_bootcmd_usb=usb start\0" \
+       "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" \
+       "mtdids="MTDIDS_DEFAULT"\0" \
+       "mtdparts="MTDPARTS_DEFAULT"\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN  (1024 * 1024) /* 1MiB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE       128
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_ARCH_CPU_INIT   /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT  /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS   4
+#define CONFIG_STACKSIZE       0x00100000      /* regular stack- 1M */
+#define CONFIG_SYS_LOAD_ADDR   0x00800000      /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00400000    /* 4M */
+#define CONFIG_SYS_MEMTEST_END 0x007fffff      /*(_8M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000    /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS     16      /* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE      /* include NetConsole support   */
+#define CONFIG_NET_MULTI       /* specify more that one ports available */
+#define        CONFIG_MII              /* expose smi ove miiphy interface */
+#define CONFIG_KIRKWOOD_EGIGA  /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS    {1,0}   /* enable both ports */
+#define CONFIG_PHY_BASE_ADR    0x8
+#define CONFIG_ENV_OVERWRITE   /* ethaddr can be reprogrammed */
+#define CONFIG_RESET_PHY_R     /* use reset_phy() to init mv8831116 PHY */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * USB/EHCI
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI                        /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_KIRKWOOD       /* on Kirkwood platform */
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_CMD_USB */
+
+/*
+ * File system
+ */
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_SYS_64BIT_VSPRINTF       /* Used for ubifs */
+#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_LZO
+
+#endif /* _CONFIG_OPENRD_BASE_H */
-- 
1.6.0.4

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