On 8 June 2015 at 06:58, Bin Meng <bmeng...@gmail.com> wrote:
> On Sun, Jun 7, 2015 at 10:50 PM, Simon Glass <s...@chromium.org> wrote:
>> Tidy up three minor problems in this file.
>>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> ---
>>
>> drivers/spi/ich.c | 5 ++---
>> 1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
>> index 50354fd..6b6cfbf 100644
>> --- a/drivers/spi/ich.c
>> +++ b/drivers/spi/ich.c
>> @@ -422,7 +422,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned
>> int bitlen,
>> int using_cmd = 0;
>> int ret;
>>
>> - /* Ee don't support writing partial bytes. */
>> + /* We don't support writing partial bytes */
>> if (bitlen % 8) {
>> debug("ICH SPI: Accessing partial bytes not supported\n");
>> return -EPROTONOSUPPORT;
>> @@ -601,7 +601,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned
>> int bitlen,
>> return status;
>>
>> if (status & SPIS_FCERR) {
>> - debug("ICH SPI: Data transaction error\n");
>> + debug("ICH SPI: Data transaction error %x\n",
>> status);
>> return -EIO;
>> }
>>
>> @@ -619,7 +619,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned
>> int bitlen,
>> return 0;
>> }
>>
>> -
>> /*
>> * This uses the SPI controller from the Intel Cougar Point and Panther
>> Point
>> * PCH to write-protect portions of the SPI flash until reboot. The changes
>> --
>
> Reviewed-by: Bin Meng <bmeng...@gmail.com>
Reviewed-by: Jagan Teki <jt...@openedev.com>
thanks!
--
Jagan | Openedev.
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