> >> Seems like nothing much doing in micron side
> >> switch (JEDEC_MFR(info)) {
> >> case CFI_MFR_ST: /* Micron, actually */
> >> /* Some Micron need WREN command; all will accept it */
> >> need_wren = true;
> >
> > Umm. Take a closer look.
> >
> > There's no break, so it continues below.
>
> Ohh.. So Linux works for you.. then is it?
Well, yes, but this code patch is actually not tested in my case,
because u-boot already resets it for Linux.
Anyway, is this what you'd like to see?
Pavel
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 4158e13..5379f18 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -43,6 +43,7 @@ enum {
SST_BP = 1 << 3,
SST_WP = 1 << 4,
WR_QPP = 1 << 5,
+ MICRON_RESET = 1 << 6,
};
#define SST_WR (SST_BP | SST_WP)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index c12e8c6..45525b5 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -85,7 +85,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL,
WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL,
WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL,
WR_QPP | SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL,
WR_QPP | E_FSR | SECT_4K},
+ {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL,
WR_QPP | E_FSR | SECT_4K | MICRON_RESET},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL,
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL,
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL,
WR_QPP | E_FSR | SECT_4K},
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 201471c..04666b9 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -8,6 +8,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#define DEBUG
#include <common.h>
#include <dm.h>
#include <errno.h>
@@ -233,6 +234,30 @@ static int spi_flash_validate_params(struct spi_slave
*spi, u8 *idcode,
flash->poll_cmd = CMD_FLAG_STATUS;
#endif
+ if (params->flags & MICRON_RESET) {
+#define CMD_RESET_ENABLE 0x66
+#define CMD_RESET_MEMORY 0x99
+ int ret;
+ /*
+ * This is needed for the SoCFPGA booting from SPI NOR flash
+ * e.g. (N25Q256A), as U-Boot SPL 2013-socfpga (only version
+ * working on that board) sets 4-byte addressing mode.
+ */
+ ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue enable reset command\n");
+ return ret;
+ }
+
+ ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0);
+ if (ret) {
+ printf("SF: Failed issue reset command\n");
+ return ret;
+ }
+
+ printf("SF: Device software reset\n");
+ }
+
/* Configure the BAR - discover bank cmds and read current bank */
#ifdef CONFIG_SPI_FLASH_BAR
u8 curr_bank = 0;
@@ -369,7 +394,7 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct
spi_flash *flash)
((flash->dual_flash > SF_SINGLE_FLASH) &&
(flash->size > SPI_FLASH_16MB_BOUN << 1))) {
puts("SF: Warning - Only lower 16MiB accessible,");
- puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
+ puts(" For full access, #define CONFIG_SPI_FLASH_BAR\n");
}
#endif
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
