[U-Boot] [PATCH 1/2] drivers: usb: fsl: Add support for two USB XHCI controllers

[Nikhil Badola]

Add support for two USB XHCI controllers for fsl platforms

Signed-off-by: Nikhil Badola <nikhil.bad...@freescale.com>
---
Depends on "fsl/usb: Add USB XHCI support"

 drivers/usb/host/xhci-fsl.c  | 17 ++++++++++++++---
 include/linux/usb/xhci-fsl.h |  5 -----
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 381c322..1d25084 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -113,8 +113,19 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, 
struct xhci_hcor **hcor)
        struct fsl_xhci *ctx = &fsl_xhci;
        int ret = 0;
 
-       ctx->hcd = (struct xhci_hccr *)FSL_XHCI_BASE;
-       ctx->dwc3_reg = (struct dwc3 *)(FSL_XHCI_BASE + DWC3_REG_OFFSET);
+       switch (index) {
+       case 0:
+               ctx->hcd = (struct xhci_hccr *)CONFIG_SYS_FSL_XHCI_USB1_ADDR;
+               break;
+       case 1:
+               ctx->hcd = (struct xhci_hccr *)CONFIG_SYS_FSL_XHCI_USB2_ADDR;
+               break;
+       default:
+               printf("ERROR: wrong controller index!!\n");
+               break;
+       };
+
+       ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
 
        ret = board_usb_init(index, USB_INIT_HOST);
        if (ret != 0) {
@@ -128,7 +139,7 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, 
struct xhci_hcor **hcor)
                return ret;
        }
 
-       *hccr = (struct xhci_hccr *)(FSL_XHCI_BASE);
+       *hccr = (ctx->hcd);
        *hcor = (struct xhci_hcor *)((uint32_t) *hccr
                                + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
 
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 1dc1e12..0019a16 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -10,9 +10,6 @@
 #ifndef _ASM_ARCH_XHCI_FSL_H_
 #define _ASM_ARCH_XHCI_FSL_H_
 
-/* Default to the FSL XHCI defines */
-#define FSL_XHCI_BASE 0x3100000
-
 /* USBOTGSS_WRAPPER definitions */
 #define USBOTGSS_WRAPRESET     (1 << 17)
 #define USBOTGSS_DMADISABLE (1 << 16)
@@ -38,8 +35,6 @@
 #define USBOTGSS_IRQ_SET_1_OEVT_EN     (1 << 16)
 #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN    (1 << 17)
 
-#define DWC3_REG_OFFSET        0xc100
-
 struct fsl_xhci {
        struct xhci_hccr *hcd;
        struct dwc3 *dwc3_reg;
-- 
1.7.11.7


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