From: Dinh Nguyen <dingu...@opensource.altera.com>
Add a section of SRAM to the SPL linker file.
Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com>
---
arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 2 ++
include/configs/socfpga_common.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index 569fa41..a868a36 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -5,6 +5,8 @@
*/
MEMORY { .sdram : ORIGIN = (0), LENGTH = (0xffffffff) }
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
+ LENGTH = CONFIG_SPL_MAX_SIZE }
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index ee227fe..d449a78 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -294,6 +294,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR
#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024)
+#define CONFIG_SPL_MAX_SIZE (64 * 1024)
#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
#define CONFIG_CRC32_VERIFY
--
2.2.1
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