Le lundi 23 février 2015 à 16:43 -0600, Nishanth Menon a écrit : > On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini <tr...@ti.com> wrote: > > On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote: > > > >> Not every version and revision of the Cortex-A8 ARM core requires the same > >> errata workarounds. In addition, enabling those requires to have similar > >> workarounds enabled in the kernel or it will cause numerous segmentation > >> faults. > >> > >> This enables those workarounds when they are needed, according to what is > >> done > >> in Linux. > >> > >> Follow-up to the discussion from July 2013: > >> http://lists.denx.de/pipermail/u-boot/2013-July/158377.html > >> > >> Signed-off-by: Paul Kocialkowski <cont...@paulk.fr> > > > > Nishanth, any comments here, since you've been thinking about errata > > stuff lately? Thanks! > > > > Reviewed-by: Tom Rini <tr...@ti.com> > > > > I would probably go with v7 start code triggering the logic. even > though the secure logic is probably unique..
It does seem like the secure logic is specific to the OMAP, even though the GP part (omap3_gp_romcode_call) seems to be generic. I don't think it would fit well in common v7 code and overall, I don't think I have sufficient knowledge of those issues to take the decision to move that code around. Hence, I'll keep my proposal to what it is now, and let someone else move the code around in the future if they feel the need to. > something like CONFIG_ARM_ARCH_CP15_ERRATA or like
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