Some boards want to skip the normal reset init. For example OMAP4 SPL
does not want to touch VBAR and many boards don't want to set up
CP15.

Provide a return value from save_boot_params() which allows the board
to indicate what reset processing should be done.

Signed-off-by: Simon Glass <s...@chromium.org>
---

 arch/arm/cpu/armv7/exynos/spl_boot.c |  5 ++++-
 arch/arm/cpu/armv7/start.S           | 11 ++++++++---
 arch/arm/include/asm/system.h        | 15 +++++++++++++++
 3 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c 
b/arch/arm/cpu/armv7/exynos/spl_boot.c
index bc237c9..6e249f1 100644
--- a/arch/arm/cpu/armv7/exynos/spl_boot.c
+++ b/arch/arm/cpu/armv7/exynos/spl_boot.c
@@ -309,4 +309,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
        while (1)
                ;
 }
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}
+u32 save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
+{
+       return 0;
+}
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index c5f94ef..0ba26f7 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -52,6 +52,9 @@ reset:
  * Continue to use ROM code vector only in OMAP4 spl)
  */
 #if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
+       teq     r0, #RESET_SKIP_VBVAR
+       bne     vbar_done
+
        /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */
        mrc     p15, 0, r2, c1, c0, 0   @ Read CP15 SCTLR Register
        bic     r2, #CR_V               @ V = 0
@@ -61,10 +64,11 @@ reset:
        ldr     r2, =_start
        mcr     p15, 0, r2, c12, c0, 0  @Set VBAR
 #endif
-
+vbar_done:
        /* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
-       bl      cpu_init_cp15
+       teq     r0, #RESET_SKIP_CP15
+       bleq    cpu_init_cp15
        bl      cpu_init_crit
 #endif
 
@@ -88,11 +92,12 @@ ENDPROC(c_runtime_cpu_setup)
 
 /*************************************************************************
  *
- * void save_boot_params(u32 r2, u32 r1, u32 r2, u32 r3)
+ * u32 save_boot_params(u32 r2, u32 r1, u32 r2, u32 r3)
  *     __attribute__((weak));
  *
  * Stack pointer is not yet initialized at this moment
  * Don't save anything to stack even if compiled with -O0
+ * Return flags - see RESET_... in system.h
  *
  *************************************************************************/
 ENTRY(save_boot_params)
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 89f2294..98e49a7 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -140,8 +140,23 @@ void flush_l3_cache(void);
  */
 #define __asmeq(x, y)  ".ifnc " x "," y " ; .err ; .endif\n\t"
 
+/* Control bits for reset processing */
+#define RESET_SKIP_VBVAR       (1 << 0)        /* Skip vector address setup */
+#define RESET_SKIP_CP15                (1 << 1)        /* Skip CP15 setup */
+
 #ifndef __ASSEMBLY__
 
+/**
+ * save_boot_params() - Save boot parameters before starting reset sequence
+ *
+ * @r0:                Value of r0
+ * @r1:                Value of r1
+ * @r2:                Value of r2
+ * @r3:                Value of r3
+ * @return reset flags (see RESET_... above)
+ */
+u32 save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3);
+
 #define isb() __asm__ __volatile__ ("" : : : "memory")
 
 #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
-- 
2.2.0.rc0.207.ga3a616c

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