This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and s3c2410 cpu's.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for thge SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Note that the existing code modified by this patch does not meet the u-boot coding style but I'd like to handle this separately and submit patches to fix this later. Signed-off-by: Kevin Morfitt <kevin.morf...@fearnside-systems.co.uk> --- cpu/arm920t/s3c24x0/timer.c | 42 ++++++++++++++++++++++++++---------------- include/configs/sbc2410x.h | 4 +--- include/configs/smdk2400.h | 4 +--- include/configs/smdk2410.h | 4 +--- include/configs/trab.h | 12 +----------- 5 files changed, 30 insertions(+), 36 deletions(-) mode change 100644 => 100755 cpu/arm920t/s3c24x0/timer.c mode change 100644 => 100755 include/configs/sbc2410x.h mode change 100644 => 100755 include/configs/smdk2400.h mode change 100644 => 100755 include/configs/smdk2410.h mode change 100644 => 100755 include/configs/trab.h diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c old mode 100644 new mode 100755 index f0a09cd..8ea2e4b --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -38,7 +38,9 @@ #include <s3c2410.h> #endif +static unsigned long get_timer_raw(void); int timer_load_val = 0; +static ulong timer_clk; /* macro to read the 16 bit timer */ static inline ulong READ_TIMER(void) @@ -66,6 +68,7 @@ int timer_init (void) * @33.25MHz and 15625 @ 50 MHz */ timer_load_val = get_PCLK()/(2 * 16 * 100); + timer_clk = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ lastdec = timers->TCNTB4 = timer_load_val; @@ -100,13 +103,13 @@ void set_timer (ulong t) void udelay (unsigned long usec) { ulong tmo; - ulong start = get_timer(0); + ulong start = get_timer_raw(); tmo = usec / 1000; tmo *= (timer_load_val * 100); tmo /= 1000; - while ((ulong)(get_timer_masked () - start) < tmo) + while ((ulong) (get_timer_raw() - start) < tmo) /*NOP*/; } @@ -119,18 +122,9 @@ void reset_timer_masked (void) ulong get_timer_masked (void) { - ulong now = READ_TIMER(); + ulong tmr = get_timer_raw(); - if (lastdec >= now) { - /* normal mode */ - timestamp += lastdec - now; - } else { - /* we have an overflow ... */ - timestamp += lastdec + timer_load_val - now; - } - lastdec = now; - - return timestamp; + return tmr / (timer_clk / CONFIG_SYS_HZ); } void udelay_masked (unsigned long usec) @@ -148,21 +142,37 @@ void udelay_masked (unsigned long usec) tmo /= (1000*1000); } - endtime = get_timer_masked () + tmo; + endtime = get_timer_raw() + tmo; do { - ulong now = get_timer_masked (); + ulong now = get_timer_raw(); diff = endtime - now; } while (diff >= 0); } +static unsigned long get_timer_raw(void) +{ + ulong now = READ_TIMER(); + + if (lastdec >= now) { + /* normal mode */ + timestamp += lastdec - now; + } else { + /* we have an overflow ... */ + timestamp += lastdec + timer_load_val - now; + } + lastdec = now; + + return timestamp; +} + /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. */ unsigned long long get_ticks(void) { - return get_timer(0); + return get_timer_raw(); } /* diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h old mode 100644 new mode 100755 index eab9629..e8afa50 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -138,9 +138,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ -/* it to wrap 100 times (total 1562500) to get 1 sec. */ -#define CONFIG_SYS_HZ 1562500 +#define CONFIG_SYS_HZ 1000 /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h old mode 100644 new mode 100755 index b712db4..22b88ae --- a/include/configs/smdk2400.h +++ b/include/configs/smdk2400.h @@ -140,9 +140,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ -/* it to wrap 100 times (total 1562500) to get 1 sec. */ -#define CONFIG_SYS_HZ 1562500 +#define CONFIG_SYS_HZ 1000 /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h old mode 100644 new mode 100755 index a473278..f45d94b --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -123,9 +123,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ -/* it to wrap 100 times (total 1562500) to get 1 sec. */ -#define CONFIG_SYS_HZ 1562500 +#define CONFIG_SYS_HZ 1000 /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/trab.h b/include/configs/trab.h old mode 100644 new mode 100755 index 7687ee6..b3f23ae --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -319,17 +319,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */ -#ifdef CONFIG_TRAB_50MHZ -/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ -/* it to wrap 100 times (total 1562500) to get 1 sec. */ -/* this should _really_ be calculated !! */ -#define CONFIG_SYS_HZ 1562500 -#else -/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */ -/* it to wrap 100 times (total 1039000) to get 1 sec. */ -/* this should _really_ be calculated !! */ -#define CONFIG_SYS_HZ 1039000 -#endif +#define CONFIG_SYS_HZ 1000 /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -- 1.6.0.6 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot