Cache-as-RAM should be turned off when we relocate since we want to run from
RAM. Add a function to perform this task.

Signed-off-by: Simon Glass <s...@chromium.org>
---

Changes in v2:
- Remove unused Lhlt code
- Use a simple 'ret' instruction to return

 arch/x86/cpu/ivybridge/car.S | 46 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/x86/cpu/ivybridge/car.S b/arch/x86/cpu/ivybridge/car.S
index 72b22ea..d5f1acf 100644
--- a/arch/x86/cpu/ivybridge/car.S
+++ b/arch/x86/cpu/ivybridge/car.S
@@ -163,6 +163,52 @@ wait_for_sipi:
        /* return */
        jmp     car_init_ret
 
+.globl car_uninit
+car_uninit:
+       /* Disable cache */
+       movl    %cr0, %eax
+       orl     $X86_CR0_CD, %eax
+       movl    %eax, %cr0
+
+       /* Disable MTRRs */
+       movl    $MTRR_DEF_TYPE_MSR, %ecx
+       rdmsr
+       andl    $(~MTRR_DEF_TYPE_EN), %eax
+       wrmsr
+
+       /* Disable the no-eviction run state */
+       movl    NOEVICTMOD_MSR, %ecx
+       rdmsr
+       andl    $~2, %eax
+       wrmsr
+
+       invd
+
+       /* Disable the no-eviction mode */
+       rdmsr
+       andl    $~1, %eax
+       wrmsr
+
+#ifdef CONFIG_CACHE_MRC_BIN
+       /* Clear the MTRR that was used to cache MRC */
+       xorl    %eax, %eax
+       xorl    %edx, %edx
+       movl    $MTRR_PHYS_BASE_MSR(2), %ecx
+       wrmsr
+       movl    $MTRR_PHYS_MASK_MSR(2), %ecx
+       wrmsr
+#endif
+
+       /* Enable MTRRs */
+       movl    $MTRR_DEF_TYPE_MSR, %ecx
+       rdmsr
+       orl     $MTRR_DEF_TYPE_EN, %eax
+       wrmsr
+
+       invd
+
+       ret
+
 mtrr_table:
        /* Fixed MTRRs */
        .word 0x250, 0x258, 0x259
-- 
2.2.0.rc0.207.ga3a616c

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