Hi Masahiro-san,
On 14.11.2014 07:03, Masahiro Yamada wrote:
This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
"socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
support.
Until this patch, the only SoCFPGA U-Boot target in mainline is
"socfpga_cyclone5". This build target is not (yet) changed to support
DT. So nothing changes for this target. Even though the long-term
goal should be to move all SoCFPGA targets over to DT.
One of the reasons to enable DT support in SoCFPGA is, that I need to
support multiple different SPI controllers for this platform. This is
the QSPI Cadence controller and the Designware SPI master controller.
Both are implemented in the SoCFPGA. And enabling both controllers is
only possible by using the new driver model (DM). The DM SPI code
only supports DT based probing. So it was easier to move SoCFPGA to
DT than to add the (deprecated) platform-data based probing to the
DM SPI suport.
Note that the image with the dtb embedded is u-boot-dtb.img. This needs
to be used now for those DT enabled boards instead of u-boot.img.
Since this patch was applied, I see a warning message
WARNING: no status info for 'socfpga_socrates'
WARNING: no maintainers for 'socfpga_socrates'
when I run tools/genboardscfg.py
I think you should add the maintainership info
F: configs/socfpga_socrates_defconfig
to somewhere of MAINTAINERS to suppress the warning message.
Yes, should be done. Not sure where I should add such information
though. We don't have a board directory for this socrates board (yet).
And the toplevel MAINTAINERS file seems to be reserved for the custodian
entries.
Any ideas / suggestions welcome.
Thanks,
Stefan
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