On 09/12/2014 02:09 AM, Shaveta Leekha wrote:
> The code provides framework for heterogeneous multicore chips based on
> StarCore
> and Power Architecture which are chasis-2 compliant, like B4860 and B4420
>
> It will make u-boot recognize all non-ppc cores and peripherals like
> SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
> Example boot logs of B4420:
> Clock Configuration:
> CPU0:1600 MHz, CPU1:1600 MHz,
> DSP CPU0:1200 MHz, DSP CPU1:1200 MHz,
> CCB:666.667 MHz,
> DDR:800 MHz (1600 MT/s data rate) (Asynchronous), IFC:166.667 MHz
> CPRI:600 MHz
> MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz
> FMAN1: 666.667 MHz
> QMAN: 333.333 MHz
>
> Top level changes include:
> (1) Top level CONFIG to identify HETEROGENUOUS clusters
> (2) CONFIGS for SC3900/DSP components
> (3) Global structure updated for dsp cores and other components
> (3) APIs to get DSP num cores and their Mask like:
> cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
> (5) Code to fetch and print SC cores and other heterogenous
> device's frequencies
> (6) README added for the same
>
> Signed-off-by: Shaveta Leekha <shav...@freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/cpu.c | 25 ++++++
> arch/powerpc/cpu/mpc85xx/speed.c | 133
> +++++++++++++++++++++++++++++
> arch/powerpc/cpu/mpc8xxx/cpu.c | 83 ++++++++++++++++++-
> arch/powerpc/include/asm/config_mpc85xx.h | 13 +++-
> arch/powerpc/include/asm/processor.h | 1 +
> doc/README.Heterogeneous-SoCs | 105 +++++++++++++++++++++++
> include/common.h | 2 +
> include/e500.h | 9 ++
> 8 files changed, 368 insertions(+), 3 deletions(-)
> create mode 100644 doc/README.Heterogeneous-SoCs
>
<snip>
> diff --git a/include/e500.h b/include/e500.h
> index 5884a22..bb8246a 100644
> --- a/include/e500.h
> +++ b/include/e500.h
> @@ -11,6 +11,7 @@
> typedef struct
> {
> unsigned long freq_processor[CONFIG_MAX_CPUS];
> + unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS];
Have you compiled all e500 platforms? This new line causes compiling error on a
lot of boards.
York
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