On Sun, 2014-09-28 at 17:23 +0200, Hans de Goede wrote: > If you take a closer look at the code you will see not all 3 writes are the > same: > > /* Set PLL ldo voltage without this PLL6 does not work properly */ > writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | > PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); > writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140) | > PRCM_PLL_CTRL_LDO_KEY, &prcm->pll_ctrl1); > writel(PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | > PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140), > &prcm->pll_ctrl1); > > This register is locked with a so called "key", the first write is to set > the key (and has everything else the same in case the key is already > written). The second write actually makes the changes, and the third write > clears the key bits.
Even after staring really hard I still don't see what differs in the first and second ones ;-) > I guess this may need some better comments :) Perhaps setclr_bits and friends might help make it obvious what is changing at each phase by allowing the other values to be omitted? Or maybe a #define for the settings themselves so that the remaining bits stand out more? Ian. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
