Hi, On Thu, Sep 18, 2014 at 4:31 PM, Hans de Goede <hdego...@redhat.com> wrote: > Hi, > > On 09/18/2014 06:27 AM, Siarhei Siamashka wrote: >> On Tue, 09 Sep 2014 09:00:57 +0200 >> Hans de Goede <hdego...@redhat.com> wrote: >> >>> Hi, >>> >>> On 09/08/2014 03:28 PM, Chen-Yu Tsai wrote: >>>> Hi everyone, >>>> >>>> This series add basic support for Allwinner's A31 SoC. The patches, >>>> excluding the first one, were cherry-picked from u-boot-sunxi. Due to >>>> the difference between u-boot mainline and u-boot-sunxi, some patches >>>> were rearranged or squashed to better fit the current state of u-boot, >>>> and not introduce any build breaks. It follows Ian's initial merge >>>> method of sun7i support: introducing various components first, then >>>> enabling them in the last commit. I tried to keep the commits separate, >>>> thus retaining the original author and Signed-off-bys. >>>> >>>> Patch 1 adds a wrapper around "func(USB, usb, 0)" in BOOT_TARGET_DEVICES >>>> to deal with breakage when USB support is not enabled. >>>> >>>> Patch 2 adds memory addresses for some hardware blocks new in sun6i. >>>> >>>> Patch 3 adds support for the new PRCM (power reset and clock management) >>>> block, which also contains PLL bias voltage control. >>>> >>>> Patch 4 adds support for the clock module. This patch is a bunch of >>>> different sun6i related patches on the clock code, from when sun6i >>>> support was introduced to u-boot-sunxi, up to its current form. >>>> This is done to avoid various conflicts and needlessly introducing >>>> then removing macros. >>>> >>>> Patch 5 adds mmc support on sun6i. >>>> >>>> Patch 6 adds uart0 muxing on sun6i. >>>> >>>> Patch 7 enables sun6i support and adds defconfig for the Colombus board. >>> >>> Chen, >>> >>> Many thanks for working on this! >>> >>> Just a quick not for people celebrating too early, this is the *incomplete* >>> sun7i support from the linux-sunxi/u-boot-sunxi git repo. It is fine to >>> merge this upstream, but this does not include SPL support. >>> >>> This allows replacing u-boot.bin on allwinnner sd-card images, which is >>> very useful. But it does not get us all the way to booting sun7i devices >>> we still need boot0 and boot1 binaries from allwinner for that (for now). >> >> If I understand it correctly, one of the things that needs to be done >> in SPL is the initialization of the DRAM controller. A few weeks ago >> Oliver has updated the http://linux-sunxi.org/DRAM_Controller page >> and added a link to the 'dram_sun6i.c' file from the rhombus-tech.net >> u-boot repository: >> >> http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;hb=refs/heads/allwinner-sunxi-a31 >> Does this repository look like exactly the missing part of code? > > Yes it does, interesting. I had found that file before, but this one > was missing in the repo I found then: > > http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/include/asm/arch-sunxi/dram.h;hb=refs/heads/allwinner-sunxi-a31 > > But with that one added, this is definitely interesting.
The A31 Hummingbird's SDK has provided us with full boot0/boot1, which also includes the dram code: http://dl.linux-sunxi.org/SDK/A31/unpacked-stripped/a31_v4.5_hummingbird_kfb_ok/lichee/boot-v1.0/boot/source/init_dram/ It is more complex than what we found in u-boot. This code also shows what is encoded into the dram parameters found in the fex files. >> Assuming that this code works, it provides a usable starting point >> for us. > > Yep, assuming :) If no one beats me to it I'll take a look at this as > time permits. > >> It looks like the Allwinner A31 DRAM controller registers are very >> similar to what is used in RK3288 (I have not checked the details, >> but if we are very lucky, it might be even a 100% perfect match): >> https://chromium-review.googlesource.com/#/c/209419/ >> And thanks to the Rockchip developers (who are contributing this >> DRAM controller support code to coreboot), now we have a lot of >> named defines for the individual bitfields in the hardware >> registers. So we can decode the magic constants used in the >> Allwinner code. And thanks to Texas Instruments, we also have >> some useful documentation, which also happens to be a reasonably >> good match: >> http://www.ti.com/lit/ug/spruhn7a/spruhn7a.pdf > > Sounds good / useful. > >> In general, if we are on our own, then we just need to do all the >> boring work again (similar to what we did with the Allwinner >> A10/A13/A20 DRAM controller earlier). Starting with the creation of the >> http://linux-sunxi.org/A31_DRAM_Controller_Register_Guide >> wiki page and populating it with the information gathered from the >> Allwinner and Rockchip source code and also from the TI Keystone2 >> documentation. Naturally, every bit of this information needs to >> be verified on real Allwinner A31 hardware before we can make any >> assumptions. > > Yep. Matching the register bits with the parts decoded from dram parameters seems like a place to start, though i don't understand much of the terminology. >> However Allwinner has promised to provide us with some better >> documentation later this month: >> https://www.mail-archive.com/linux-sunxi@googlegroups.com/msg06840.html >> I don't know if they are going to include the documentation for the >> DRAM controller in the first new documentation delivery. It surely >> may be complicated, because Allwinner is obviously licensing the DRAM >> controller IP from a third party and not designing it from scratch >> (in a nice company with Rockchip and Texas Instruments). But Texas >> Instruments somehow can provide the DRAM controller documentation >> in free public access. So I would guess that it should be possible >> for Allwinner too. >> >> We still need proper Power-Down and Self-Refresh mode support for >> Allwinner A10/A13/A20. And I had plans to do some investigation for >> this stuff. But now this activity is temporarily suspended until >> we see what kind of assistance Allwinner is going to provide to us >> (A usable DRAM controller documentation? A contribution of DRAM >> code for u-boot? Nothing?). Cheers ChenYu _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
