On 21.09.2014 14:58, Marek Vasut wrote:
This entire series is the second stab at making SoCFPGA usable with
mainline U-Boot again. There are much fewer bits missing than in the
last series, more cleanup happened and bugs were fixed. This allows
me to use mainline U-Boot on my SoCFPGA systems.
The big missing part is the SPL generation, which still needs a lot
of additional work. We also miss the Cadence QSPI controller driver.
This set contains patches for a few subsystems, which are utilized
by the SoCFPGA, but the most part is the SoCFPGA chip support. This
series now contains cleanup for the mayhem in drivers/fpga/altera.c
code, which was terrible, but is now much better.
Thanks Marek!
I have tested your latest patchset on the EBV SoCrates board. And it
works really good. Once this is all available in mainline I'll send a
patch to add the SoCrates and a new custom SoCFPGA board support to the
list.
For now, please add my tested-by to the patchset:
Tested-by: Stefan Roese <s...@denx.de>
Thanks,
Stefan
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